Re: Serial DS3 port problem

From: Tito Basa (titobi@yahoo.com)
Date: Mon Mar 18 2002 - 05:06:01 EST


--- Gert Doering <gert@greenie.muc.de> wrote:>
> Sounds not completely unlikely to me - if the line
> is hardware looped,
> there is no clock source unless you set "clock
> source internal".
>
> Due to crosstalk or whatnot, it is possible that the
> other T3s get "some
> sort of signal" from somewhere, amplify it (because
> clock is looped back),
> and work without any reference clock, but that's
> just by chance.

I've been testing one of those ports earlier without
adding a "clock source internal" to my interface
config and I can see the loop. One of my T3s had
problems affected by a submarine cable break about a
month ago and two weeks later we upgraded to
12.0(21)S1 to fix CEF and IPC errors. I still don't
know if it's affected by the IOS upgrade we did and
I'm still waiting for TAC for their own simulation
results.

thanks,

tito

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