Re: [nsp] [nsp] RSP8 amd Rec. Side Buffering (was: VIP if-con and IOS switching)

From: Gert Doering (gert@greenie.muc.de)
Date: Wed May 30 2001 - 03:13:54 EDT


Hi,

On Tue, May 29, 2001 at 11:13:19PM -0700, Siva Valliappan wrote:
> really need to finish reading the rest of the book, and this may already
> be covered. the essential difference between the SP and the
> SSP is an additional switching feature -
>
> ip route-cache sse
> ipx route-cache sse
> .
> .
> etc
>
> the forwarding is cache based (i don't remember if we download the
> cache onto the SSE or if the SSE does a lookup in the RP memory,
> need to check the code to verify that)

From what the various "show" commands suggest, the SSE seems to be a
dedicated microprocessor that is field-programmed by the RP with the
actual "route cache" in program form.

(Unfortunately my last RP/SSE went out of service some months ago,
otherwise I could demonstrate what I mean).

gert

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Gert Doering - Munich, Germany                             gert@greenie.muc.de
fax: +49-89-35655025                        gert.doering@physik.tu-muenchen.de



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