RE: [nsp] Interface MIB & Cisco MGX 8850 release 2

From: Basil Dolmatov (dol@cplire.ru)
Date: Mon Oct 29 2001 - 06:08:42 EST


Followup question - where are placed specific Stratacom MIBs?

one or two referencies in docs state that it is "under product specific
URL",
but I failed to find it on CCO.

I need IGX MIBs now, if anyone could point me to right URL... :(

Thanks in advance,
---------------------------------------
Basil (Vasily) Dolmatov CCIE #5347
Demos-Internet Ltd. http://www.demos.su

> -----Original Message-----
> From: Stefan Watermann [mailto:stefan@debitel.net]
> Sent: Sunday, October 28, 2001 2:23 AM
> To: cisco-nsp@puck.nether.net
> Subject: [nsp] Interface MIB & Cisco MGX 8850 release 2
>
>
> Hi all,
>
> we have a bunch of STM-1's and E3's connected to various AXM's on
> MGX 8850 rel 2
> ATM switches.
>
> I'm trying to get an idea of the line utilization of those STM-1's using
> IF-MIB (RFC 2233?) ifInOctets/ifOutOctets with MRTG.
> Unfortunately the IF-MIB is not
> completely supported in 2.0.13 and ifInOctets/ifOutOctets are not
> implemented.
>
> Does anybody have a working solution which can be used with MRTG?
>
> I already had a look into CISCO-ATM-VIRTUAL-IF-MIB.
> CaviStatEgressEntry/CaviStatIngressEntry
> could probably be used for a solution. From the whole sequence
> caviEgrRcvClp0Cells/caviEgrRcvClp1Cells
> could probably simply be sumed up. But I'm not sure if these
> values are enough.
>
> Any hints are appreciated.
>
> Many thanks in advance,
>
> Stefan
>
> --
> Stefan Watermann stefan@debitel.net
>



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