[cisco-nas] AS5400 resetting when pri-group is removed.

Joseph Mays mays at win.net
Mon Aug 2 14:37:56 EDT 2010


The problem is occuring in main:text. Is that likely to be a bug in IOS, or 
a slightly corrupted version of the IOS image that is only showing up in 
this condition?


> Having a strange problem with an AS5400. Trying to change the number of 
> channels in a pri-group. When we remove the pri-group...
>
> "no pri-group timeslots 1-23 nfas_d primary nfas_int 0 nfas_group 1 iua 
> xxxgroupname"
>
> The system resets. Here's the "show ver" after a reset.
>
> Cisco Internetwork Operating System Software
> IOS (tm) 5400 Software (C5400-JS-M), Version 12.3(6a), RELEASE SOFTWARE 
> (fc4)
> Copyright (c) 1986-2004 by cisco Systems, Inc.
> Compiled Fri 02-Apr-04 17:47 by kellythw
> Image text-base: 0x60008AFC, data-base: 0x61980000
>
> ROM: System Bootstrap, Version 12.1(2r)XD1, RELEASE SOFTWARE (fc1)
> BOOTLDR: 5400 Software (C5400-BOOT-M), Version 12.3(1a), RELEASE SOFTWARE 
> (fc1)
>
> NW5400A uptime is 21 minutes
> System returned to ROM by bus error at PC 0x60374FEC, address 0xD0D0E05 at 
> 10:13:37 UTC Mon Aug 2 2010
> System image file is "flash:c5400-js-mz.123-6a.bin"
>
> cisco AS5400 (R7K) processor (revision T) with 524288K/65536K bytes of 
> memory.
> Processor board ID JAB043902VQ
> R7000 CPU at 250MHz, Implementation 39, Rev 1.0, 256KB L2, 2048KB L3 Cache
> Last reset from warm-reset
> Bridging software.
> X.25 software, Version 3.0.0.
> SuperLAT software (copyright 1990 by Meridian Technology Corp).
> TN3270 Emulation software.
> Primary Rate ISDN software, Version 1.1.
> Manufacture Cookie Info:
> EEPROM Type 0x0001, EEPROM Version 0x01, Board ID 0x31,
> Board Hardware Version 3.27, Item Number 800-5171-01,
> Board Revision B0, Serial Number JAB043902VQ,
> PLD/ISP Version 2.2,  Manufacture Date 20-Sep-2000.
> Processor 0x14, MAC Address 0x02FD653658
> Backplane HW Revision 1.0, Flash Type 5V
> 2 FastEthernet/IEEE 802.3 interface(s)
> 222 Serial network interface(s)
> 384 terminal line(s)
> 9 Channelized T1/PRI port(s)
> 1 Channelized T3 port(s)
> 512K bytes of non-volatile configuration memory.
> 65536K bytes of processor board System flash (Read/Write)
> 8192K bytes of processor board Boot flash (Read/Write)
>
> Configuration register is 0x2102
>
>
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