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BRAS#show version <BR>Cisco IOS Software, 7200 Software (C7200-ADVIPSERVICESK9-M), Version 12.4(9)T1, RELEASE SOFTWARE (fc2)<BR>Technical Support: <A href="http://www.cisco.com/techsupport">http://www.cisco.com/techsupport</A><BR>Copyright (c) 1986-2006 by Cisco Systems, Inc.<BR>Compiled Wed 30-Aug-06 20:48 by prod_rel_team<BR>
ROM: System Bootstrap, Version 12.2(4r)B2, RELEASE SOFTWARE (fc2)<BR>
BRAS uptime is 2 hours, 0 minutes<BR>System returned to ROM by error - an Error Interrupt, PC 0x600E1604 at 03:39:16 UTC Mon Nov 17 2008<BR>System image file is "disk0:c7200-advipservicesk9-mz.124-9.T1.bin"<BR>
<BR>This product contains cryptographic features and is subject to United<BR>States and local country laws governing import, export, transfer and<BR>use. Delivery of Cisco cryptographic products does not imply<BR>third-party authority to import, export, distribute or use encryption.<BR>Importers, exporters, distributors and users are responsible for<BR>compliance with U.S. and local country laws. By using this product you<BR>agree to comply with applicable laws and regulations. If you are unable<BR>to comply with U.S. and local laws, return this product immediately.<BR>
A summary of U.S. laws governing Cisco cryptographic products may be found at:<BR><A href="http://www.cisco.com/wwl/export/crypto/tool/stqrg.html">http://www.cisco.com/wwl/export/crypto/tool/stqrg.html</A><BR>
If you require further assistance please contact us by sending email to<BR><A href="mailto:export@cisco.com">export@cisco.com</A>.<BR>
Cisco 7206VXR (NPE400) processor (revision A) with 491520K/32768K bytes of memory.<BR>Processor board ID 16072994<BR>R7000 CPU at 350MHz, Implementation 39, Rev 3.3, 256KB L2 Cache<BR>6 slot VXR midplane, Version 2.0<BR>
Last reset from power-on<BR>
PCI bus mb0_mb1 (Slots 0, 1, 3 and 5) has a capacity of 600 bandwidth points.<BR>Current configuration on bus mb0_mb1 has a total of 400 bandwidth points. <BR>This configuration is within the PCI bus capacity and is supported. <BR>
PCI bus mb2 (Slots 2, 4, 6) has a capacity of 600 bandwidth points.<BR>Current configuration on bus mb2 has a total of 0 bandwidth points <BR>This configuration is within the PCI bus capacity and is supported. <BR>
Please refer to the following document "Cisco 7200 Series Port Adaptor<BR>Hardware Configuration Guidelines" on Cisco.com <<A href="http://www.cisco.com">http://www.cisco.com</A>><BR>for c7200 bandwidth points oversubscription and usage guidelines.<BR>
<BR>2 FastEthernet interfaces<BR>125K bytes of NVRAM.<BR>
125440K bytes of ATA PCMCIA card at slot 0 (Sector size 512 bytes).<BR>8192K bytes of Flash internal SIMM (Sector size 256K).<BR>Configuration register is 0x2102<BR>
Hello Everyone,<BR>
<BR>
Do you know why 7200 used as BRAS, it always get restart?<BR>
<BR>
could you help to give any clues?<BR>
<BR>
Bellow is my # show version.<BR>
<BR>
Thanks,<BR>
<BR>
Sarith,<BR>
<BR>
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