[nsp] mls in the core?

[Darren Smith]

Hi Stephen,

cisco Cat6k-MSFC2 (R7000) processor with 491520K/32768K bytes of memory.
Processor board ID SAD05040UEC
R7000 CPU at 300Mhz, Implementation 39, Rev 2.1, 256KB L2, 1024KB L3 Cache
Last reset from power-on

512mb! :-)

I have Dual Cat-6509 MSFC-SUP2's in the core, Gig-E's to Telehouse & Redbus.

Cisco 7401's at the end of each Gig-E terminating such things as LINX and
transit providers :)

All my routers peer with a set of Zebra route-reflectors so I don't overload
the 6509 (They have a route-limit right?)

Job done :-)

Works very fast.

Regards

Darren Smith
Game Digital Ltd

> cisco Catalyst 6000 (R7000) processor with 227328K/34816K bytes of memory.
> Processor board ID SAD0541065U
> R7000 CPU at 300Mhz, Implementation 39, Rev 2.1, 256KB L2, 1024KB L3 Cache
>
> What features are you talking about?
>
> - jared
>
> --
> Jared Mauch  | pgp key available via finger from jared@puck.nether.net
> clue++;      | http://puck.nether.net/~jared/  My statements are only
mine.
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