[c-nsp] CPU utilization and performance - 7500

Rodney Dunn rodunn at cisco.com
Thu Oct 21 21:53:33 EDT 2004

It's the ingress VIP CPU checking the txq in MEMD
for an available txacc to use.  It's not
the egress VIP spinning.

The rx buffering is on the ingress vip and it's
per egress *interface*.

IMO we should have never done *any* rxbuffering but
rather just dropped the packets.  Maybe there
was some reason 10 years ago I don't know about. :)


On Mon, Oct 04, 2004 at 01:55:40PM -0700, Bruce Robertson wrote:
> So, speaking from my background in embedded system development, why does the
> design of the VIP require this spinning of the CPU?  Why can't the transmit
> interrupt service routine handle the job when the txqueue becomes available?
> On any embedded system, there should be sufficient hardware capabilities
> to avoid this kind of CPU spinning.  If nothing else, you're pushing up
> power consumption unnecessarily.
> --
> Bruce Robertson, President/CEO				     +1-775-348-7299
> Great Basin Internet Services, Inc.			fax: +1-775-348-9412
> http://www.greatbasin.net

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