[c-nsp] Troubleshooting Lag between GigE interfaces

[Rodney Dunn]

On Thu, Sep 23, 2004 at 11:53:39AM -0400, Paul Stewart wrote:
> So, because
> 
> gw-7513#sh align
>  
> No alignment data has been recorded.
>  
> No spurious memory references have been recorded.
> 
> is clean.. then I need to identify why it's packet switching even though
> dcef is running correct?

Correct.  But, you can't dCEF switch packets if dCEF isn't
running to the VIP slots.  That's what we need to figure
out first.

dCEF running on a card doesn't have anything to do with
features.

dCEF not running usually is because the VIP doesn't have
enough memory to store the FIB so it disables itself.

Or either we lost IPC communication to the slot (ie:
CPU is too high to respond to keepalives) and it disables
itself.

  Sorry, just need to understand what I'm trying
> to resolve..;)
> 
> Paul
> 
> 
> On Thu, 2004-09-23 at 11:47, Rodney Dunn wrote:
> > On Thu, Sep 23, 2004 at 11:36:16AM -0400, Paul Stewart wrote:
> > > On Thu, 2004-09-23 at 11:22, Rodney Dunn wrote:
> > > > That traffic hitting the input queue should ONLY
> > > > be traffic destined to/from the router.
> > > > 
> > > > What is the background interrupt level CPU traffic
> > > > on the RSP?
> > > > 
> > > 
> > > How can I tell this?  Sorry but I can do a "sh proc cpu" and get this:
> > > 
> > > CPU utilization for five seconds: 14%/10%; one minute: 20%; five
> > > minutes: 21%
> > > 
> > > But I don't believe that's what you're after..:)
> > 
> > That tells you that 10% of the overall 14% CPU usage is
> > spent under interrupt level and we do 3 things under interrupt
> > level:
> > 
> > a) switch packets
> > b) do alignment corrections
> > c) d spurious access corrections
> > 
> > if 'sh align' is clean then it's packet switching.  Which
> > makes sense based on your 'sh int stat' output.
> > If all packets on a 75xx running dCEf are distributed switched
> > the RSP CPU will be at 0% under interrupt level.
> > 
> > > 
> > > Paul
> > >