[c-nsp] Carrier access on existing channelized DS3?

[Ted Mittelstaedt]

The biggest problem I've had when I've purchased the local loop
separately is getting tiedown info from the carriers.  Often
what happens is the carrier is in one place in the CO and the
loop provider is in a different place, and the magic network
faries what fly in the sky make the cross connect.  When the
carrier provides loop, they send their own techs in to the CO
to make the cross connect.  When you buy the loop separately,
the carrier claims it's the responsibility of the loop provider
to make the cross connect, and the loop provider claims it's
the responsibility of the carrier to make the cross connect.

The one thing that I have noticed on T1's that pass through
a DACS is that somehow the DACS always seems to provide
clocking.  In theory your supposed to setup one end of the
T1 to provide clock and the other end to obtain it, but
when I have done that in the past I always get slips.  When
I setup both ends to obtain clock from the loop, everything
is happy.  Maybe the MCI engineers are used to sourcing clock
when they provide the loop.  I would bet that in this config
if they setup to obtain clock from the loop that they would
see the timing errors go away.

Ted

>-----Original Message-----
>From: cisco-nsp-bounces at puck.nether.net
>[mailto:cisco-nsp-bounces at puck.nether.net]On Behalf Of Josh Higham
>Sent: Wednesday, August 03, 2005 9:00 AM
>To: cisco-nsp at puck.nether.net
>Subject: [c-nsp] Carrier access on existing channelized DS3?
>
>
>We have a channelized DS3 from the ILEC, and when getting price quotes I
>specify that I will provide the loop for the service.
>
>I spoke with MCI/UUnet today, and their sales rep bought in a pre-sales
>engineer to strongly urge against that configuration.  Some of the
>reasons I can deal with (they don't provide SLA, toubleshooting can
>involve finger pointing), but they also had some technical issues that
>didn't sound right to me.
>
>The engineer said that if they provision they can choose ports on the
>DAX(?) to have the best timing match.  If they ride the DS3 they don't
>have that choice, so they get timing errors.  Is there any validity to
>this?  As far as I know (not very far :-) timing is per T1 line, and
>there is no relation between timing on different circuits.
>
>Thanks,
>Josh
>
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