[c-nsp] BGP hardware requirements

[Bernd Ueberbacher]

I agree with the point that you will need more memory for full table,
but afaik know, the ISRs can do BGP with IP Base
(http://www.cisco.com/web/partners/downloads/765/tools/quickreference/isr.pdf).


Greets, Bernd





Campbell, Alex schrieb:
> Your feature set (IP Base) does not support BGP.
>
> Also you'll need more than 256MB of RAM to take full tables.  Taking
> full tables for 1mbps or 2mbps transits seems like overkill, but this
> depends on your application and requirements.
>
> 2800s are software based routers that don't have a very powerful CPU, so
> processing large amounts of BGP updates may cause them to struggle.
>
> My advice: upgrade to SP Services and take only a default route from
> each provider.
>
>
>
> -----Original Message-----
> From: cisco-nsp-bounces at puck.nether.net
> [mailto:cisco-nsp-bounces at puck.nether.net] On Behalf Of Dracul
> Sent: Thursday, 30 August 2007 3:31 PM
> To: cisco-nsp at puck.nether.net
> Subject: [c-nsp] BGP hardware requirements
>
> Hi All is BGP configuration ok for these scenarios?
>
> 1MB and 2MB leased line link
> 1MB and 1MB leased line link
>
> (also its a v.35 and fastethernet combo)
>
> what would be the best setup? Full routes? Def routes?
>
> Here's the show version of the router I will be using. can it support
> BGP?
>
> =====
> Cisco IOS Software, 2800 Software (C2800NM-IPBASE-M), Version 12.4(3f),
> RELEASE SOFTWARE (fc3) Technical Support:
> http://www.cisco.com/techsupport Copyright (c) 1986-2006 by Cisco
> Systems, Inc.
> Compiled Fri 18-Aug-06 18:47 by alnguyen
>
> ROM: System Bootstrap, Version 12.4(1r) [hqluong 1r], RELEASE SOFTWARE
> (fc1)
>
> gw-oberoi-bng-in uptime is 19 weeks, 8 hours, 7 minutes System returned
> to ROM by reload at 08:26:42 UTC Sun Mar 18 2007 System image file is
> "flash:c2800nm-ipbase-mz.124-3f.bin"
>
> Cisco 2851 (revision 53.51) with 251904K/10240K bytes of memory.
> Processor board ID FHK103670G9
> 2 Gigabit Ethernet interfaces
> 2 Serial(sync/async) interfaces
> DRAM configuration is 64 bits wide with parity enabled.
> 239K bytes of non-volatile configuration memory.
> 62720K bytes of ATA CompactFlash (Read/Write)
>
> Configuration register is 0x2102
>
> =====
>
> regards,
> chris
> _______________________________________________
> cisco-nsp mailing list  cisco-nsp at puck.nether.net
> https://puck.nether.net/mailman/listinfo/cisco-nsp
> archive at http://puck.nether.net/pipermail/cisco-nsp/
> _______________________________________________
> cisco-nsp mailing list  cisco-nsp at puck.nether.net
> https://puck.nether.net/mailman/listinfo/cisco-nsp
> archive at http://puck.nether.net/pipermail/cisco-nsp/
>