[c-nsp] Possible timing problems

[james edwards]

This is on the 3700 and a DS3 card. Looks like I am losing timing, which is
derived from the line.
I have searched on "clock change..." and have not pulled anything up at
Cisco. I am not taking any errors.
I wish there was a clock slip counter.

Any ideas ?



Apr 14 02:23:06.295 MST: %LINK-3-UPDOWN: Interface ATM1/0, changed state to
up
Apr 14 02:23:06:  clock change done for int ATM1/0
Apr 14 02:23:07:  clock change removed for int ATM1/0
Apr 14 02:23:08:  clock change done for int ATM1/0
Apr 14 02:23:10.299 MST: %LINK-3-UPDOWN: Interface ATM1/0, changed state to
down
Apr 14 02:23:59:  clock change removed for int ATM1/0
Apr 14 02:24:01.302 MST: %LINK-3-UPDOWN: Interface ATM1/0, changed state to
up
Apr 14 02:24:01:  clock change done for int ATM1/0
Apr 14 02:24:03.302 MST: %LINK-3-UPDOWN: Interface ATM1/0, changed state to
down
Apr 14 02:26:46:  clock change removed for int ATM1/0
Apr 14 02:26:48.318 MST: %LINK-3-UPDOWN: Interface ATM1/0, changed state to
up
Apr 14 02:26:49.318 MST: %LINEPROTO-5-UPDOWN: Line protocol on Interface
ATM1/0, changed state to up
Apr 14 02:53:59:  clock change done for int ATM1/0


xxxxx_3700#sho controll | in clock
 TX and RX clocks detected.
Clock Source      INTERNAL (but the source of this clock is derived from
LINE)

Roswell_3700#sho controll atm1/0 | in error-free
LCV error-free secs                     875335
DS3: F/M-bit error-free secs            875342
DS3: parity error-free secs             875335
DS3: path parity error-free secs        875335
T3/E3: excessive zeros error-free secs  875335
DS3/E3: G.832 FEBE error-free secs      868416
uncorrectable HEC error-free secs       875406
xxxx_3700#


-- 
James H. Edwards
Senior Network Systems Administrator
Judicial Information Division
jedwards at nmcourts.gov