[c-nsp] ASR-100x intro

Sat Feb 16 04:34:08 EST 2013

On Feb 8, 2013, at 12:27 PM, Mack McBride wrote:

> One of the questions I haven't gotten a good answer to.
> The ESP actually has the hardware for the route table.
> The ESP20 and ESP40 handle 4 million routes.
> The others handle less (the 5G for examples handles 500k v4 or 125k v6).

And the ASR-1002-X with the "integrated" ESP-?? handles "1M IPv4 or 1M IPv6 routes" according to http://www.cisco.com/en/US/prod/collateral/routers/ps9343/data_sheet_c78-450070.html

But the ESP-20 and ESP-40, which share many specs with the mystery embedded ESP in the 1002-X claims "4M IPv4 or 4M IPv6".

I don't know what the "OR" means, I can have 1M v4 OR 1M v6 but not some mix of the two?  The use of the word "or" there is strange.

And the RP side is clear as mud as well.  The RP2 also claims "4M IPv4 or 4M IPv6" with the 16GB RAM option, but then the 1002-X "embedded" RP2 is back at the "1M IPv4 or 1M IPv6" number even though it's possible to order the 1002-X with 16GB RAM.

Am I understanding the architecture of this correctly?  I mean, if my RP2 can hold 4M routes, which today would be what, about 9 full views, are ALL those routes shoved down to the forwarding plane, or just the "best" routes?  If so, why can't a lesser-spec'd ESP be limited to 1M routes even if the RP2 has 4M "possible" paths?

> What happens to the other routes?

Maybe we're asking the same question.  I hope so.

> It seems they could get handled in software but the ESP is basically software anyway.
> So the situation is clearly opaque.

The 1002-X makes it even more opaque.  Someone said earlier in the thread that the 1002-X is essentially a fixed-config with an RP2 and an ESP-40.  But the specs don't match, at least on the number of routes.

There's also this interesting bit of the ESP data sheet.  Looking at the non-integrated ESP, memory amounts are stated thusly:

For 20-Gbps Cisco ASR 1000 ESP: 
1-GB Cisco QuantumFlow Processor, 4-GB DRAM, 40-Mb TCAM, and 256-MB packet buffer memory

For the 1002-X integrated ESP:

1-GB Cisco QuantumFlow Processor Resource Memory, 40-Mb TCAM, and 512-MB packet buffet memory. Share the same control memory on route processor.

Note that it has the same "QuantumFlow Processor Resource Memory" (1GB), the same 40Mb(bit?) TCAM, and double (512MB) the packet buffer memory, but the "control memory" is shared with the RP, whereas the non-integrated ESP has 4GB dedicated.  It kind of sounds like the models with integrated RP and ESP have both units jammed on one board, how else are they sharing DRAM?

> The MX80 from juniper for example has the same situation and is equally opaque.

We've had some very rough times getting similar information on the Juniper MX series.  There is some hint that the RP equivalent can have more routes than the FIB, but nothing definite and no hard numbers so far after putting in multiple requests with our Juniper salesperson.  We're also getting mixed answers about whether the integrated GigE ports on the MX are capable of hierarchical queueing when the chassis is fully "unlocked" as an MX-80 (this sounds incorrect based on what I've read, but some SE over there is claiming that's the case).

All I really want to know is if 3-5 years down the line, assuming these graphs (http://bgp.potaroo.net/v6/v6rpt.html) are still ramping up and we are looking at 4-5 full views of v4 and v6 will I be needing to retire the damn thing.  Traffic-wise, both boxes are fine for that long.  I also suspect (at least in the cisco case with the RP2) there is enough cpu power to last quite some time.

This is almost making going with a used 6500 bundle look appealing.

Charles

> LR Mack McBride
> Network Architect
> 
> -----Original Message-----
> From: cisco-nsp-bounces at puck.nether.net [mailto:cisco-nsp-bounces at puck.nether.net] On Behalf Of Nick Hilliard
> Sent: Thursday, February 07, 2013 8:45 AM
> To: Adam Vitkovsky
> Cc: cisco-nsp at puck.nether.net
> Subject: Re: [c-nsp] ASR-100x intro
> 
> On 07/02/2013 12:04, Adam Vitkovsky wrote:
>> Wow so from ASR1004 and upwards we're indeed not limited by the number 
>> of VPN routes anymore so goodbye RR Planes (I'm going to miss this 
>> state of art BGP design). 8k sessions is also enough to serve a 
>> particular region
> 
> on the asr1k, you can stop propagation of the best path rib entries to the hardware fib, which will usually max out at either 500k or else 1m entries.
> This means that when acting as a RR, the asr1k is constrained only by the amount of RAM and the CPU power.  The FIB size is no longer relevant.
> 
> The command to do this is:
> 
> router bgp 64512
> table-map rm-filter-bgp-to-fib		<------- magic sauce
> neighbor x.y.z.w route-reflector-client  [etc]
> 
> route-map rm-filter-bgp-to-fib permit
> match blahblahblah
> 
> You can then tune the rm-filter-bgp-to-fib route-map only to permit what you want in your TCAM instead of getting everything, including VPN prefixes.
> 
> So on an asr1001, which you can pimp up to 16G, you could handle many full DFZ VPNs separately, even though the box can only handle 1m prefixes in hardware.  Just be careful about the ASR1002: the base model can only take 4G RAM and this is not upgradable.  This limitation is fixed in the ASR1002X.
> 
> Nick
> 
> 
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