[c-nsp] Does FPGA or Fabric ASIC honour priority on dCEF720 LCs WS-X6708-10GE

[Adam Vitkovsky]

Hi Folks,

I’d like to ask if FPGA or Fabric ASIC on dCEF720 Line-Cards WS-X6708-10GE  do have any concept of priority.

If I assume the link from FPGA to Fabric ASIC is just 16G,
Then if I run 20G of traffic from port ASICs to FPGA,
Then FPGA would have to be dropping 4G worth of traffic and if there’s no concept of priority then…

The problem would be even worse on Fabric ASIC which has only 20G Fabric Channel.
So if both FPGA supply 16G then Fabric ASIC would have to be dropping 12G of traffic.

So if there’s no concept of priority on FPGA one would need to make sure no more than 8G is coming from each Port ASIC
And if there’s no concept of priority Fabric ASIC then one would need to make sure no more than 5G is coming from each Port ASIC (or only use one port per FPGA)

Thanks,

adam






        Adam Vitkovsky
        IP Engineer

T:      0333 006 5936
E:      Adam.Vitkovsky at gamma.co.uk
W:      www.gamma.co.uk

This is an email from Gamma Telecom Ltd, trading as “Gamma”. The contents of this email are confidential to the ordinary user of the email address to which it was addressed. This email is not intended to create any legal relationship. No one else may place any reliance upon it, or copy or forward all or any of it in any form (unless otherwise notified). If you receive this email in error, please accept our apologies, we would be obliged if you would telephone our postmaster on +44 (0) 808 178 9652 or email postmaster at gamma.co.uk

Gamma Telecom Limited, a company incorporated in England and Wales, with limited liability, with registered number 04340834, and whose registered office is at 5 Fleet Place London EC4M 7RD and whose principal place of business is at Kings House, Kings Road West, Newbury, Berkshire, RG14 5BY.