Thanks Mack, I already check this post , do you confirm that there is no way to check the load on the FPGA that connect port pairs as SAKU said ? Br. KAYSSAR BEN HAMMADI IP Technical Manager CCIE (#48406), JNCIE-M (#471), JNCIE-SP (#1147) Mobile : +216 29 349 952 / +216 98 349 952