[c-nsp] 4x10G Etherchannel overruns

Laurent Dumont ldumont at coldnorthadmin.com
Thu Mar 9 00:07:50 EST 2017


Probably also worth checking which version of the 6900 line card you are 
running - just in case

http://www.cisco.com/c/en/us/products/collateral/switches/catalyst-6500-series-switches/qa_c67-649419.pdf

Laurent

On 03/08/2017 11:43 PM, Laurent Dumont wrote:
> What does the CPU look like when the traffic is flowing? I'd be 
> curious to also see the traffic breakdown per interface - not the 
> Port-Channel itself.
>
>
> On 03/08/2017 06:49 PM, Jean-Francois.Dube at videotron.com wrote:
>> Hi Peter,
>>
>> Do the overrun match with input drops on the interfaces input queue? 
>> Maybe
>> this traffic being punted to CPU?
>>
>> I had this issue on a Cisco 7600 when using "mpls ldp explicit-null" and
>> many Gbps of traffic needed to be sent to CPU.
>>
>> Hope this helps.
>>
>> Cheers,
>>
>> JF
>>
>> Jean-François Dubé
>> Technicien, Opérations Réseau IP
>> Ingénierie Exploitation des Réseaux
>> Vidéotron
>>
>> "cisco-nsp" <cisco-nsp-bounces at puck.nether.net> a écrit sur 2017-03-03
>> 12:04:28 :
>>
>>> De : "Peter Kranz" <pkranz at unwiredltd.com>
>>> A : <cisco-nsp at puck.nether.net>,
>>> Date : 2017-03-03 12:09
>>> Objet : [c-nsp] 4x10G Etherchannel overruns
>>> Envoyé par : "cisco-nsp" <cisco-nsp-bounces at puck.nether.net>
>>>
>>> On a WS-X6908-10G DCEF2T line card with SUP2T's, I ran into overruns
>>> yesterday on a 4x10G etherchannel that I am at a loss to resolve:
>>>
>>>
>>>
>>> Constantly increasing overrun counter:
>>>
>>>     6418130558941 packets input, 9277559958229871 bytes, 0 no buffer
>>>
>>>       Received 668274 broadcasts (0 IP multicasts)
>>>
>>>       0 runts, 190 giants, 0 throttles
>>>
>>>       192 input errors, 1 CRC, 0 frame, 51591389 overrun, 0 ignored
>>>
>>>
>>>
>>> Latency into the router rose by 40ms when these overrun's started to
>> appear
>>>
>>>
>>> This happened at a BW of ~28 Gbps
>>>
>>>
>>>
>>> I've built the etherchannel in this manner:
>>>
>>>
>>>
>>> Index   Load      Port          EC state       No of bits
>>>
>>> ------+------+------------+------------------+-----------
>>>
>>> 0      0A            Te1/1             Active   2
>>>
>>> 3      81            Te1/2             Active   2
>>>
>>> 1      60            Te1/3             Active   2
>>>
>>> 2      14            Te1/4             Active   2
>>>
>>>
>>>
>>> Is it necessary to instead stagger 1/1, 1/3, 1/5, 1/7 to spread the 
>>> load
>>> across the card ASICs? I didn't think the WS-X6908 was an 
>>> oversubscribed
>>> card so didn't bother initially.
>>>
>>>
>>>
>>> Peter Kranz
>>> www.UnwiredLtd.com <http://www.unwiredltd.com/>
>>> Desk: 510-868-1614 x100
>>> Mobile: 510-207-0000
>>> pkranz at unwiredltd.com <mailto:pkranz at unwiredltd.com>
>>>
>>>
>>>
>>> _______________________________________________
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>
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