[c-nsp] Cisco N540-ACC-SYS ipv4 routes

[Łukasz Bromirski]

Mark,

> On 13 Jul 2020, at 09:55, Mark Tinka <mark.tinka at seacom.com> wrote:
> 
> On 13/Jul/20 09:20, Saku Ytti wrote:
> 
>> But if that is a strict definition, then we don't really have ASICs
>> outside really cheap switches, as there is some programmability in all
>> new stuff being released. So I'm not sure what the correct definition
>> is.
> 
> I've been thinking about this over the past 4 years, actually, and I
> came to the conclusion that it was mostly championed by the 6500/7600
> ASIC's, and Juniper's earlier Internet Processor I and Internet
> Processor II ASIC's.
> 
> Since that time, we've asked routers to do more things beyond simple IP
> packet forwarding, which has required those chips to evolve more into
> NPU's than ASIC's. I'd say from around the ASR1000, MX and later, is
> when we saw this shift.
> 
> […]

> Ultimately, I'm not sure it matters that much nowadays, but I wouldn't
> mind having the discussion :-).

I’d risk stating the obvious - technology is moving in one great sinusoidal shape. We tend to deaggregate, and then to aggregate, just to deaggregate again. The only thing that really changes is speed of those cycles.

Current trend is to simplify (Segment Routing) so there’s chance hardware of tomorrow can be less complex and do much less with faster speeds. But at some point there will be new protocols, applications, overlays and whatever, so there will be need to do more than just basics. You also can’t bet on oversimplifying things, as Juniper with PTX (for example) found out.

Do we have ASICs? Yes, they *still* usually drive fabrics, all else is essentially NPU - because it can be reprogrammed on the fly. As Saku pointed out, there’s less and less difference between modern x86 architectures and networking NPUs however and given how much different things can be easily done in software, this trend will continue to drive “cloud” applications. This should also help “simplifcation” trend, as there will be less and less dependency on the fancy “hardware” capabilities of a box.

Next wave will (are) probably photonics, moving further and further into direct feature capabilities without influencing speed-down to tackle specific feature in silicon. That will be true test to “how many features you *really* need” and great area to optimize further. Question is - how fast we’ll get there realistically with shipping products and how much it will level field vendors are playing on with Customers.

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