sh version
Cisco Internetwork Operating System Software 
IOS (tm) s72033_rp Software (s72033_rp-JK9S-M), Version 12.2(18)SXD7, RELEASE SOFTWARE (fc1)
Technical Support: http://www.cisco.com/techsupport
Copyright (c) 1986-2005 by cisco Systems, Inc.
Compiled Tue 13-Dec-05 21:30 by kellythw
Image text-base: 0x4002100C, data-base: 0x42698000

ROM: System Bootstrap, Version 12.2(17r)S2, RELEASE SOFTWARE (fc1)
BOOTLDR: s72033_rp Software (s72033_rp-JK9S-M), Version 12.2(18)SXD7, RELEASE SOFTWARE (fc1)

6500 uptime is 23 minutes
Time since 6500 switched to active is 22 minutes
System returned to ROM by unknown reload cause - suspect boot_data[BOOT_COUNT] 0x0, BOOT_COUNT 0, BOOTDATA 19 (SP by power-on)
System image file is "sup-bootflash:s72033-jk9s-mz.122-18.SXD7.bin"


This product contains cryptographic features and is subject to United
States and local country laws governing import, export, transfer and
use. Delivery of Cisco cryptographic products does not imply
third-party authority to import, export, distribute or use encryption.
 --More--         Importers, exporters, distributors and users are responsible for
compliance with U.S. and local country laws. By using this product you
agree to comply with applicable laws and regulations. If you are unable
to comply with U.S. and local laws, return this product immediately.

A summary of U.S. laws governing Cisco cryptographic products may be found at:
http://www.cisco.com/wwl/export/crypto/tool/stqrg.html

If you require further assistance please contact us by sending email to
export@cisco.com.

cisco WS-C6509 (R7000) processor (revision 3.2) with 983008K/65536K bytes of memory.
Processor board ID SAL09433Y75
SR71000 CPU at 600Mhz, Implementation 0x504, Rev 1.2, 512KB L2 Cache
Last reset from power-on
Bridging software.
X.25 software, Version 3.0.0.
SuperLAT software (copyright 1990 by Meridian Technology Corp).
TN3270 Emulation software.
1 Virtual Ethernet/IEEE 802.3  interface(s)
88 Gigabit Ethernet/IEEE 802.3 interface(s)
1917K bytes of non-volatile configuration memory.
 --More--         8192K bytes of packet buffer memory.

65536K bytes of Flash internal SIMM (Sector size 512K).
Configuration register is 0x2102

6500#sh boot
BOOT variable = ,1;sup-bootflash:s72033-jk9s-mz.122-18.sxd7.bin,1
CONFIG_FILE variable = 
BOOTLDR variable = 
Configuration register is 0x2102

Standby is not up.
6500#reload

System configuration has been modified. Save? [yes/no]: n
Proceed with reload? [confirm]

00:24:37: %SYS-5-RELOAD: Reload requested by console. Reload Reason: Reload Command.
00:24:40: %SYS-SP-3-LOGGER_FLUSHING: System pausing to ensure console debugging output.

00:24:40: %OIR-SP-6-CONSOLE: Changing console ownership to switch processor



00:24:41: %SYS-SP-3-LOGGER_FLUSHED: System was paused for 00:00:00 to ensure console debugging output.

00:24:41: SP: The PC in slot 2 is shutting down. Please wait ...
00:24:41: SP: The PC in slot 3 is shutting down. Please wait ...
00:24:41: SP: The PC in slot 7 is shutting down. Please wait ...
00:25:27: %SYS-SP-3-LOGGER_FLUSHING: System pausing to ensure console debugging output.



***
*** --- SHUTDOWN NOW ---
***

00:25:27: %SYS-SP-5-RELOAD: Reload requested
00:25:27: %OIR-SP-6-CONSOLE: Changing console ownership to switch processor



00:25:27: %SYS-SP-3-LOGGER_FLUSHED: System was paused for 00:00:00 to ensure console debugging output.

System Bo