[f-nsp] Fwd: L4 CAM exhaustion
Fabio Mendes
fabio.mendes at bsd.com.br
Thu May 20 15:40:58 EDT 2010
Unfortunately the word to is not recognized by the software. I would have to
issue the command for each DMA individually.
However, I have the attached output, caught when the box was in a
"exhausted" state.
On Thu, May 20, 2010 at 4:17 PM, manolo hernandez <mhernand1 at comcast.net>wrote:
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> On 5/20/10 3:04 PM, Fabio Mendes wrote:
> > Hello Guys,
> >
> > We are facing a strange situation on a customer.
> >
> > During random periods, BigIron syslogs this kind of message:
> >
> > May 20 15:24:13:I:System: CPU protection action2 deactivated at 000b7e00
> > May 20 15:23:48:I:System: CPU protection action2 activated at 000b7d00
> > May 20 15:23:22:I:System: CPU protection action2 deactivated at 000b7c00
> > May 20 15:22:57:I:System: CPU protection action2 activated at 000b7b00
> > May 20 15:22:31:I:System: CPU protection action2 deactivated at 000b7a00
> > May 20 15:22:05:I:System: CPU protection action2 activated at 000b7900
> > May 20 15:21:40:I:System: CPU protection action2 deactivated at 000b7800
> > May 20 15:21:14:I:System: CPU protection action2 activated at 000b7700
> >
> > The box do have the "cpupro-action hardware-flooding enable" command
> > enabled, with the default thresholds.
> >
> > When the box goes this state we issue the "sh l2-cpu all" command, which
> > shows:
> >
> > SSH at BigIron#sh l2-cpu all
> >
> > Condition Configuration:
> > 01: 00000001 Atomic cpu dwm: 90, cwm: 60
> > 02: 00000002 Atomic cam dwm: 90, cwm: 60
> > 03: 00000003 Composite or(1,2)
> >
> > System Condition Monitoring: *Exhausted*.
> > CPU Condition: Normal.
> > DWM:90 CWM:60 CUR:14 CNT:0
> > Layer 2 CAM Condition: Normal.
> > DWM:90 CWM:60 CUR:4 CNT:0
> > Layer 3 CAM Condition: Normal.
> > DWM:90 CWM:60 CUR:7 CNT:0
> > Layer 4 CAM Condition: *Exhausted*.
> > **DWM:90 CWM:60 CUR:91 CNT:4**
> >
> > Action Configuration:
> > 1: action(03) q-aging(Dis) Deactivated
> > History: activated 0 times, deactivated 0 times
> > 2: action(03) hw-flood(Ena) Deactivated
> > History: activated 33 times, deactivated 33 times
> >
> > When this kind of thing happens, some servers/clients experinece
> > connection losses (this is the box trying to go back to its "normal"
> > state I suppose).
> >
> > Unfortunately "show cam-partition detail" command does not show enough
> > information for debbuging purposes.
> >
> > Have anyone someone faced something similar ? What could this be ?
> >
> >
> > --
> >
> > CCNA - Cisco Certified Network Associate
> > CCNP - Cisco Certified Network Professional
> >
> > "A bird that you set free may be caught again, but a word that escapes
> > your lips will not return." Jewish Proverb
> >
> >
> >
> > _______________________________________________
> > foundry-nsp mailing list
> > foundry-nsp at puck.nether.net
> > http://puck.nether.net/mailman/listinfo/foundry-nsp
> Fabio,
> If this is m3 or m4 based jetcore try dm cam stat 0 to 5 this will
> give you a status of the cam buckets available.
>
>
> Manolo
>
>
>
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> =ikPu
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>
--
CCNA - Cisco Certified Network Associate
CCNP - Cisco Certified Network Professional
"A bird that you set free may be caught again, but a word that escapes your
lips will not return." Jewish Proverb
--
CCNA - Cisco Certified Network Associate
CCNP - Cisco Certified Network Professional
"A bird that you set free may be caught again, but a word that escapes your
lips will not return." Jewish Proverb
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***** EXHAUSTED ******
SSH@#sh l2-cpu all
Condition Configuration:
01: 00000001 Atomic cpu dwm: 90, cwm: 60
02: 00000002 Atomic cam dwm: 90, cwm: 60
03: 00000003 Composite or(1,2)
System Condition Monitoring: Exhausted.
CPU Condition: Normal.
DWM:90 CWM:60 CUR:14 CNT:0
Layer 2 CAM Condition: Normal.
DWM:90 CWM:60 CUR:4 CNT:0
Layer 3 CAM Condition: Normal.
DWM:90 CWM:60 CUR:7 CNT:0
Layer 4 CAM Condition: Exhausted.
DWM:90 CWM:60 CUR:91 CNT:4
Action Configuration:
1: action(03) q-aging(Dis) Deactivated
History: activated 0 times, deactivated 0 times
2: action(03) hw-flood(Ena) Deactivated
History: activated 33 times, deactivated 33 times
Action Execution:
SSH@#sh cam-partition det
==== SLOT 1 CAM PARTITION ====
IGC: 0 (0x00)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28578 (0x06fa2)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8101 (0x01fa5)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2552 (0x009f8)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2448 (0x00990)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 4 (0x00004)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 1 (0x01)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28626 (0x06fd2)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8116 (0x01fb4)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2560 (0x00a00)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2400 (0x00960)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 2 (0x00002)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
==== SLOT 2 CAM PARTITION ====
IGC: 4 (0x04)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2046 (0x007fe)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28534 (0x06f76)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 7814 (0x01e86)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 10 (0x0000a)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 1044 (0x00414)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 4 (0x00004)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 5 (0x05)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28626 (0x06fd2)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8117 (0x01fb5)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2560 (0x00a00)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2280 (0x008e8)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 4 (0x00004)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
==== SLOT 3 CAM PARTITION ====
IGC: 8 (0x08)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2046 (0x007fe)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28523 (0x06f6b)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 7996 (0x01f3c)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 362 (0x0016a)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2336 (0x00920)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 4 (0x00004)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 9 (0x09)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2046 (0x007fe)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28550 (0x06f86)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8020 (0x01f54)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 1384 (0x00568)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2392 (0x00958)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 4 (0x00004)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 10 (0x0a)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2046 (0x007fe)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28573 (0x06f9d)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8029 (0x01f5d)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 1106 (0x00452)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2336 (0x00920)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 4 (0x00004)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 11 (0x0b)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2046 (0x007fe)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28564 (0x06f94)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 7974 (0x01f26)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 806 (0x00326)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 1752 (0x006d8)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 4 (0x00004)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
==== SLOT 4 CAM PARTITION ====
IGC: 12 (0x0c)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2046 (0x007fe)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28507 (0x06f5b)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 7866 (0x01eba)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 10 (0x0000a)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 1218 (0x004c2)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 4 (0x00004)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 13 (0x0d)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2046 (0x007fe)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28523 (0x06f6b)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8041 (0x01f69)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 982 (0x003d6)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2392 (0x00958)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 4 (0x00004)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 14 (0x0e)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28577 (0x06fa1)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8041 (0x01f69)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 1678 (0x0068e)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2336 (0x00920)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 4 (0x00004)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 15 (0x0f)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2046 (0x007fe)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28562 (0x06f92)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8023 (0x01f57)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 1322 (0x0052a)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 1752 (0x006d8)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 4 (0x00004)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
==== SLOT 5 CAM PARTITION ====
IGC: 16 (0x10)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2046 (0x007fe)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28576 (0x06fa0)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8054 (0x01f76)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 1896 (0x00768)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 1752 (0x006d8)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 4 (0x00004)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 17 (0x11)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2046 (0x007fe)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28583 (0x06fa7)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8074 (0x01f8a)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 1918 (0x0077e)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2336 (0x00920)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 4 (0x00004)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 18 (0x12)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2046 (0x007fe)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28576 (0x06fa0)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8071 (0x01f87)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 1416 (0x00588)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2336 (0x00920)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 4 (0x00004)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 19 (0x13)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2046 (0x007fe)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28569 (0x06f99)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8018 (0x01f52)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 1090 (0x00442)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2336 (0x00920)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 4 (0x00004)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
==== SLOT 6 CAM PARTITION ====
IGC: 20 (0x14)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2046 (0x007fe)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 27944 (0x06d28)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 7901 (0x01edd)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 0 (0x00000)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 34 (0x00022)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 456 (0x001c8)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 2 (0x00002)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 21 (0x15)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2046 (0x007fe)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28562 (0x06f92)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 7999 (0x01f3f)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 830 (0x0033e)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 1752 (0x006d8)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 4 (0x00004)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 22 (0x16)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2046 (0x007fe)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28557 (0x06f8d)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8008 (0x01f48)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 916 (0x00394)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2280 (0x008e8)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 4 (0x00004)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 23 (0x17)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28626 (0x06fd2)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8115 (0x01fb3)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2560 (0x00a00)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 1752 (0x006d8)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 4 (0x00004)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
==== SLOT 8 CAM PARTITION ====
IGC: 28 (0x1c)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28626 (0x06fd2)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8118 (0x01fb6)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2560 (0x00a00)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2392 (0x00958)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 4 (0x00004)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 29 (0x1d)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28626 (0x06fd2)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8118 (0x01fb6)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2560 (0x00a00)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2448 (0x00990)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 4 (0x00004)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 30 (0x1e)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28621 (0x06fcd)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8087 (0x01f97)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2554 (0x009fa)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2560 (0x00a00)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 504 (0x001f8)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 31 (0x1f)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28626 (0x06fd2)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8117 (0x01fb5)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2560 (0x00a00)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2560 (0x00a00)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 504 (0x001f8)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
==== SLOT 9 CAM PARTITION ====
IGC: 32 (0x20)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28608 (0x06fc0)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8102 (0x01fa6)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2560 (0x00a00)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2560 (0x00a00)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 504 (0x001f8)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 33 (0x21)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28133 (0x06de5)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8077 (0x01f8d)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2550 (0x009f6)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2560 (0x00a00)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 504 (0x001f8)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 34 (0x22)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28617 (0x06fc9)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8105 (0x01fa9)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2560 (0x00a00)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2560 (0x00a00)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 504 (0x001f8)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 35 (0x23)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28626 (0x06fd2)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8117 (0x01fb5)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2560 (0x00a00)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2560 (0x00a00)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 504 (0x001f8)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
==== SLOT 10 CAM PARTITION ====
IGC: 36 (0x24)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28626 (0x06fd2)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8096 (0x01fa0)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2560 (0x00a00)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2560 (0x00a00)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 504 (0x001f8)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 37 (0x25)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28626 (0x06fd2)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8117 (0x01fb5)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2560 (0x00a00)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2560 (0x00a00)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 504 (0x001f8)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 38 (0x26)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28626 (0x06fd2)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8113 (0x01fb1)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2560 (0x00a00)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2560 (0x00a00)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 504 (0x001f8)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 39 (0x27)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28625 (0x06fd1)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8112 (0x01fb0)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2560 (0x00a00)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2560 (0x00a00)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 504 (0x001f8)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
==== SLOT 11 CAM PARTITION ====
IGC: 40 (0x28)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28626 (0x06fd2)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8110 (0x01fae)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2560 (0x00a00)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2560 (0x00a00)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 504 (0x001f8)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 41 (0x29)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28626 (0x06fd2)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8116 (0x01fb4)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2560 (0x00a00)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2560 (0x00a00)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 504 (0x001f8)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 42 (0x2a)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28578 (0x06fa2)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8100 (0x01fa4)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2508 (0x009cc)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2560 (0x00a00)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 504 (0x001f8)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 43 (0x2b)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28626 (0x06fd2)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8117 (0x01fb5)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2560 (0x00a00)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2560 (0x00a00)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 504 (0x001f8)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
==== SLOT 12 CAM PARTITION ====
IGC: 44 (0x2c)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2046 (0x007fe)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28523 (0x06f6b)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8083 (0x01f93)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2548 (0x009f4)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2448 (0x00990)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 4 (0x00004)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 45 (0x2d)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28626 (0x06fd2)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8105 (0x01fa9)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2560 (0x00a00)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2560 (0x00a00)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 504 (0x001f8)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 46 (0x2e)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28550 (0x06f86)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8078 (0x01f8e)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 1354 (0x0054a)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2560 (0x00a00)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 504 (0x001f8)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 47 (0x2f)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 27849 (0x06cc9)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8037 (0x01f65)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2494 (0x009be)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2560 (0x00a00)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 504 (0x001f8)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
==== SLOT 13 CAM PARTITION ====
IGC: 48 (0x30)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28626 (0x06fd2)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8113 (0x01fb1)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2560 (0x00a00)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2560 (0x00a00)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 504 (0x001f8)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 49 (0x31)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 27811 (0x06ca3)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8084 (0x01f94)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2546 (0x009f2)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2448 (0x00990)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 4 (0x00004)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 50 (0x32)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 27907 (0x06d03)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8021 (0x01f55)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2332 (0x0091c)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2560 (0x00a00)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 504 (0x001f8)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 51 (0x33)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28117 (0x06dd5)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8074 (0x01f8a)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2538 (0x009ea)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2504 (0x009c8)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 4 (0x00004)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
==== SLOT 14 CAM PARTITION ====
IGC: 52 (0x34)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28426 (0x06f0a)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8091 (0x01f9b)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2554 (0x009fa)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2560 (0x00a00)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 4 (0x00004)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 53 (0x35)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28604 (0x06fbc)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8095 (0x01f9f)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2554 (0x009fa)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2560 (0x00a00)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 504 (0x001f8)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 54 (0x36)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28521 (0x06f69)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8037 (0x01f65)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 1054 (0x0041e)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2448 (0x00990)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 4 (0x00004)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
IGC: 55 (0x37)
Number of CAM devices per IGC: 1
Number of hw entries per CAM: 0x08000
Total size of CAM = 2Mbits
complete CAM index range per IGC:
(sw) 1 - 49151 (1 - 0x0bfff), total entries: 49151 (0x0bfff)
(hw) 0 - 32767 (0 - 0x07fff), total entries: 32768 (0x08000)
Percentage of CAM hardware entries for each partition:
Layer3 = 16384 (1Mbits) (50%)
Level3 = 1023 (0.062438Mbits) (3.121948%)
Level2 = 1024 (0.0625Mbits) (3.125%)
Layer2 = 8192 (0.5Mbits) (25%)
Layer4 = 8192 (0.5Mbits) (25%)
Layer 3 sw index range:
L3 L3 1 - 2047 (0x00001 - 0x007ff), free 2047 (0x007ff)
L3 L2 2048 - 4095 (0x00800 - 0x00fff), free 2048 (0x00800)
L3 4096 - 32767 (0x01000 - 0x07fff), free 28625 (0x06fd1)
layer 3 hw index range (inversely mapped):
16383 - 0 (0x03fff - 0x00000)
L2 index range:
(sw) 32768 - 40959 (0x08000 - 0x09fff), free 8098 (0x01fa2)
(hw) 16384 - 24575 (0x04000 - 0x05fff)
L4 pool 3 index range:
(sw) 40960 - 43519 (0x0a000 - 0x0a9ff), free 2560 (0x00a00)
(hw) 24576 - 27135 (0x06000 - 0x069ff)
L4 pool 2 index range:
(sw) 43520 - 46079 (0x0aa00 - 0x0b3ff), free 2560 (0x00a00)
(hw) 27136 - 29695 (0x06a00 - 0x073ff)
L4 pool 1 index range:
(sw) 46080 - 48639 (0x0b400 - 0x0bdff), free 2560 (0x00a00)
(hw) 29696 - 32255 (0x07400 - 0x07dff)
L4 pool 0 index range:
(sw) 48640 - 49151 (0x0be00 - 0x0bfff), free 504 (0x001f8)
(hw) 32256 - 32767 (0x07e00 - 0x07fff)
SSH@#
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