[j-nsp] Memory Allocation per FPC

Hannes Gredler hannes at juniper.net
Mon May 9 02:20:08 EDT 2005


i'd recommend you to distribute the 4xGE cards and the oc-3
cards over FPC in slot 2,3 in order to not get into the
bandwith limit (3.2GBps) to the fabric;

i.e. slot layout:

FPC0 1xoc48
FPC1 1xoc48
FPC2 1xGE 1xGE 4xoc3 4xoc3
FPC3 1xGE 1xGE 4xoc3

/hannes

On Mon, May 09, 2005 at 05:57:41AM +0000, The Drifter wrote:
| We are running an M20 with
| 2xSTM-16 cards. (FPC0, FPC1)
| 3x4OC-3 cards (FPC2)
| We need to add 4xGE cards.
| So, I am thinking if the architecture permits Pooling of FPC resources to 
| release enough memory+switching power to allow adding the 4xGE cards.
| 
| Thanks,
| Jimmy
| 
| >From: Hannes Gredler <hannes at juniper.net>
| >To: The Drifter <prophecy_68 at hotmail.com>
| >CC: juniper-nsp at puck.nether.net
| >Subject: Re: [j-nsp] Memory Allocation per FPC
| >Date: Mon, 9 May 2005 00:27:12 +0200
| >
| >On Sun, May 08, 2005 at 08:34:17AM +0000, The Drifter wrote:
| >| Hannes,
| >| I have been waiting patiently, Many thanks for this description. It is 
| >very
| >| useful, correct me if i am wrong below:
| >|
| >| 1. the hardware configuration on the box is Independent of the 
| >performance
| >| of the router & I can stick in PICs anywhere
| >
| >correct no PIC dependencies wrt performance;
| >
| >| 2. Also even if I am using only 2 FPCs, I can get more performance if I
| >| plug in All the FPCs
| >
| >not correct - each FPC1 supports a "fabric" bandwidth of 3.2Gbps for user 
| >data;
| >an additonal FPC increates the aggregate fabric bandwith, howver it also
| >has to support more PICs then ....
| >
| >| 3. Can you please goint me to FPC types/memory-size  link, for M-series
| >| routers??
| >
| >--->just issue a "show chassis fpc detail" and watch the SDRAM portion
| >--->example taken froma M10i FEB
| >Slot 0 information:
| >  State                               Online
| >  Logical slot                      0
| >  Total CPU DRAM                  128 MB
| >  Total SRAM                        4 MB
| >  Total SDRAM                      64 MB
| >  Total notification SDRAM         12 MB
| >  I/O Manager ASIC information        Version 3.1, Foundry IBM, Part 
| >number 0
| >  Start time                          2005-04-19 09:53:39 CEST
| >  Uptime                              19 days, 14 hours, 27 minutes, 46 
| >seconds
| >
| >| 3. I wouldn't mind getting more information on dynamic/static allocation,
| >| at all  ;)
| >
| >well, what is the problem you're trying to solve ? and why is knowledge
| >of our mem allocation relvant to it ?
| >
| >/hannes
| >
| >
| >| >From: Hannes Gredler <hannes at juniper.net>
| >| >To: The Drifter <prophecy_68 at hotmail.com>
| >| >CC: juniper-nsp at puck.nether.net
| >| >Subject: Re: [j-nsp] Memory Allocation per FPC
| >| >Date: Sun, 8 May 2005 09:53:01 +0200
| >| >
| >| >each stream (= a port on a PIC) will be assigned a buffer space
| >| >equal to 200ms (m-series) and 100ms (t-series) of bandwidth-delay
| >| >product so a STM-4 does consume 622/8*0.2 = 15.55MB buffers space;
| >| >
| >| >now the difficult part:
| >| >
| >| >the buffer is not statically allocated to a single FPC but rather
| >| >to the pooled memory of all FPCs on a PFE. also the packet itself
| >| >will be sprayed in quantums of 64-bytes called j-cells across
| >| >the contributing FPC SRAMs; so for example it would well be
| >| >that a 250 bytes packet enters the router on FPC0 and its
| >| >fragments are stored on FPC{1,2,3,4}; on the egress stage
| >| >the packets are reassembled and passed to the I/O manager ASIC
| >| >for queuing/rewrite etc.
| >| >
| >| >the difficult^2 part:
| >| >is not a pure static allocation but also has a dynamic component;
| >| >however the application/purpose of static/dynamic allocation
| >| >i believe would go beyond what you have been asking, right ;-)
| >| >
| >| >/hannes
| >| >
| >| >On Mon, May 02, 2005 at 12:49:07PM +0000, The Drifter wrote:
| >| >| How is the memory of an FPC allocated per PIC. Is it allocated equally
| >| >per
| >| >| each PIC? Or is it allocated by the Buffer Manager (PFE) per data 
| >packet
| >| >| received?
| >| >| Therefore a STM4 PIC will useup more memory of the FPC then a DS-3 
| >PIC?
| >|
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| >
| >--
| >_____________________________________________________
| >hannes gredler             mobile: +43 676 9380638
| >network support engineer    email: hannes at juniper.net
| >juniper networks inc.,      skype: hannesgredler9000
| 
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-- 
_____________________________________________________
hannes gredler             mobile: +43 676 9380638
network support engineer    email: hannes at juniper.net
juniper networks inc.,      skype: hannesgredler9000


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