[j-nsp] MX960 40GE DPC
Richard A Steenbergen
ras at e-gerbil.net
Sat Sep 1 16:27:51 EDT 2007
On Sat, Sep 01, 2007 at 08:55:26AM -0400, Eric Van Tol wrote:
> Does the MX960 DPCE-R support 100/1000BaseX/T or just 1000BaseX/T? Also
> what does enhanced Layer 2 features does this DPC have over the DPC-R?
> VPLS scaling?
The DPC-E is the exact same thing as the DPC (for both 40x1G and 4x10GE),
but with a newer rev EZchip with a larger microcode capacity. I'm sure at
some point not having it will ass you out of some layer 2 features
somewhere down the road, but they're still rolling out the L2 features in
8.4+ so for the moment it's the same thing. Since this only affects the
EZchip there are no differences in traditional Juniper features (same
I-Chip 3.0 on both boards), so VPLS should be unaffected. I believe the
Triton and Bellini cards are all rev B EZchips, so only the first gen
Atlas cards will have the -E variant. And no AFAIk they don't do 100M. :)
--
Richard A Steenbergen <ras at e-gerbil.net> http://www.e-gerbil.net/ras
GPG Key ID: 0xF8B12CBC (7535 7F59 8204 ED1F CC1C 53AF 4C41 5ECA F8B1 2CBC)
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