[j-nsp] [m10i] PIC-FPC throughput
Jonas Frey (Probe Networks)
jf at probe-networks.de
Tue Aug 30 03:00:12 EDT 2011
The 3.2 Gbps limitation depends on the CFEB you have.
The CFEB-E bumps this up to full line rate on all ports (4 Gbps per
FPC).
M7i 8.4Gbps half-duplex CFEB / 10Gbps half-duplex CFEB-E
(this is because of the integrated GE/2FE Ports)
M10i 12.8Gbps half-duplex legacy CFEB, 3.2Gbps per FPC
16Gbps half-duplex CFEB-E, 4Gbps per FPC
Anyway you always have only 1 Gbps per PIC towards the backplane
regardless of how many GE ports that PIC actually has.
Jonas
Am Dienstag, den 30.08.2011, 02:00 +0400 schrieb Nick Kritsky:
> Hi all,
>
> From the Juniper documentation I know that there is a throughput limitation
> of 3.2 Gbps per FPC on m10i routers. Does it mean that there is 800Mbps
> limitation on each PIC inserted in PIC slot on given FPC? Or is it an
> aggregate limitation. To give you the real life example - should I be
> worried if total usage on 4 interfaces of ge-0/0/* wants to go over 1G, if
> the total usage of ge-0/*/* is still below 2G. If that matters, the PIC in
> question is IQ2.
>
> any help is very good.
> thanks
> Nick Kritsky
> _______________________________________________
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