[j-nsp] PCS statistics, Errored blocks

[Christopher Costa]

On our 10GE-LR interface connected to our carrier's dwdm transport circuit,
the PCS Errored blocks counter is sporadically incrementing on one side of
the circuit.  This sometimes is accompanied by link flaps, but not always.
 No other physical layer counters are incrementing when viewing a "sh int
media detail" command.  The carrier points to a log they observed during
one of these instances that mentioned "De-encapsulated Loss of Sync" and
feels the issue is on our side.

I think I gather that the PCS Errored blocks are associated with the
64B/66B encoding mechanism happening at the PHY layer of the interface that
used for clock recovery and stream alignment.  I haven't been able to nail
down, though, whether these errors are are a result of my local LR optic's
Tx or are they being received from the carrier's circuit.  Any insight
would be appreciated.


Thanks,
Chris