[j-nsp] understand the DRAM usage on CFEB(FEB-M10i-M7i-S)

[Martin T]

Hi,

according to Juniper M10i Compact Forwarding Engine
Board(http://www.juniper.net/techpubs/en_US/release-independent/junos/topics/concept/cfeb-m10i-description.html)
documentation it has 128 MiB SDRAM for packet memory and 128 MiB SDRAM
for the microkernel. If I visually inspect the CFEB, then it has
twelve "MT 46V8M16" DDR SDRAM chips which means 12x 134217728 bits,
i.e. 192MiB of on-board soldered DDR SDRAM. Questions:

1) Are four "MT 46V8M16" DDR SDRAM chips actually not in use? If they
are in use, then what for?

2) Am I correct that on-board soldered DRAM is used for shared packet
buffer and installable DDR SDRAM SODIMM is used for the microkernel?


thanks,
Martin