[VoiceOps] Timing slips on subrate DS1s on CT3
Alex Balashov
abalashov at evaristesys.com
Fri Mar 7 14:05:50 EST 2014
Hi,
I was hoping I could pick someone's brain here about an issue that has
me stumped.
Customer has a Cisco AS5400 (non-XM) with a channelised T3 from
$MAJORTELCO. The 28 subrate DS1s are just PRIs, no NFAS, just 23B+1D on
every DS1. Like so:
controller T3 6/0
framing m23
clock source line
t1 1-28 controller
!
controller T1 6/0:1
framing esf
pri-group timeslots 1-24
!
controller T1 6/0:2
framing esf
pri-group timeslots 1-24
!
[and so on]
They were having some Q.931 messaging issues that were ultimately traced
to timing slips on the DS1s.
And yes, there are timing slips indeed:
VOIPGW-1#show controllers T1 6/0:1
T1 6/0:1 is up.
Applique type is Channelized T1
No alarms detected.
alarm-trigger is not set
Soaking time: 3, Clearance time: 10
AIS State:Clear LOS State:Clear LOF State:Clear
Version info of slot 6: HW: 768, PLD Rev: 1
Framer Version: 0x28
Manufacture Cookie Info:
EEPROM Type 0x0001, EEPROM Version 0x01, Board ID 0x01,
Board Hardware Version 3.0, Item Number 73-4089-03,
Board Revision B0, Serial Number JAB0429044D,
PLD/ISP Version <unset>, Manufacture Date 14-Jul-2000.
Framing is ESF, Clock Source is Line.
Data in current interval (579 seconds elapsed):
0 Line Code Violations, 0 Path Code Violations
579 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
579 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0
Unavail Secs
$MAJORTELCO says this is because we're not taking recovering clock from
the line. But we quite clearly are: "Framing is ESF, Clock Source is
Line." In fact, this IOS release (Version 12.4(7g)) doesn't seem to
give me a way to change that even if I wanted to. This subcommand:
controller T3 6/0
t1 1 clock source internal
... would be the normal way to do it, but the only subcommand that
exists for 't1 X' is 'controller'.
There are no PM errors on the T3 itself:
T3 6/0 is up.
Applique type is Channelized T3
No alarms detected.
Framing is M23, Line Code is B3ZS, Clock Source is Line
Data in current interval (750 seconds elapsed):
0 Line Code Violations, 0 P-bit Coding Violation
0 C-bit Coding Violation, 0 P-bit Err Secs
0 P-bit Severely Err Secs, 0 Severely Err Framing Secs
0 Unavailable Secs, 0 Line Errored Secs
0 C-bit Errored Secs, 0 C-bit Severely Errored Secs
So, what's the deal? Where are these timing slips on the DS1s coming from?
--
Alex Balashov - Principal
Evariste Systems LLC
235 E Ponce de Leon Ave
Suite 106
Decatur, GA 30030
United States
Tel: +1-678-954-0670
Web: http://www.evaristesys.com/, http://www.alexbalashov.com/
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