Most folks face some challenges when processing line-rate packets, currently the state of the art inspection is done at 10 Gigabits or so. Processing of these packets could be done with ethernet cards that include the Xilinx XAUI FPGA. These include such things as built-in 4 lane PCIe capabilities, and one could presumably push a basic TCP/IP stack to the card and perform iperf or other actions.
Some Japanese folks have already built some network testing equipment similar to this, called the GtrcNET-10p3. They have a 2 month lead time for the hardware. It would seem that you could do some interesting modifications to the platform to forward matching packets from some criteria elsewhere. As long as I’m reading the specs right, we’re talking about the ability to have 3GB of memory available externally. The use of this for network debugging, tracing, or even data interception when properly fed make it interesting.
There are some network cards that include this Xilinx FPGA on the market, this would mean you can do interesting types of activities in a standard PC platform when the FPGA is properly programmed.