[c-nsp] GEIP+ high CPU

Rodney Dunn rodunn at cisco.com
Tue Dec 21 10:38:56 EST 2004


Some customers wanted it for consistency
in their pop design for the connection to the
core. Some customers wanted it so the
infrastructure was already there and in
place getting ready for an aggregation box
ugprade.

I work on multiple networks where the
GEIP+ fits perfectly to do just that.

It's not perfect for every deployment scenario
for sure.
 
Rodney


On Tue, Dec 21, 2004 at 10:19:32AM -0500, Jon Lewis wrote:
> On Tue, 21 Dec 2004, Jeff Calvert wrote:
> 
> > I have 6 GEIP+ cards in production.  The big difference between the GEIP
> > and GEIP+ is the PCI bus.  The GEIP has a single 33MHz PCI bus
> > connection to the backplane.  The GEIP+ has two 33MHz PCI bus
> > connections to the backplane, one for rx and one for tx.  The 800Mb/sec
> > number is 400Mb/sec rx + 400Mb/sec tx.  Of course this means the real
> > world limit is about 300Mb/sec in whichever direction your traffic is
> > heavy.
> 
> So it sounds like a GEIP+ would have been marginally better than a 3 FE
> etherchannel, but not likely worth the expense...and a GEIP would have
> been a complete waste of money as it would do about FE speed at gigabit
> signaling.  Why'd they even bother releasing the GEIP?  Did the first
> gigabit switches not have any 100baseT capable ports?
> 
> ----------------------------------------------------------------------
>  Jon Lewis                   |  I route
>  Senior Network Engineer     |  therefore you are
>  Atlantic Net                |
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