[c-nsp] 7204-npe300 error

[Skeeve Stevens]

System returned to ROM by error - an Error Interrupt, PC 0x60676558 at
14:07:28 AEST Tue Mar 20 2007

Any ideas where I would start looking?

Ram error? NPE error? Something else?  It is running the same code as
another one sitting next to it.. Identical, and it has no issues.

The router also is essentially doing nothing. 5 ospf routes from a
neighbour. that's it.

.Skeeve


--- show ver ---
EQ_7204_LNS_1#show ver
Cisco Internetwork Operating System Software 
IOS (tm) 7200 Software (C7200-IK8S-M), Version 12.2(40), RELEASE SOFTWARE
(fc1)
Copyright (c) 1986-2006 by cisco Systems, Inc.
Compiled Thu 12-Oct-06 20:08 by pwade
Image text-base: 0x60008940, data-base: 0x6143A000

ROM: System Bootstrap, Version 12.0(19990210:195103) [12.0XE 105],
DEVELOPMENT SOFTWARE

EQ_7204_LNS_1 uptime is 1 hour, 25 minutes
System returned to ROM by error - an Error Interrupt, PC 0x60676558 at
14:07:28 AEST Tue Mar 20 2007
System image file is "slot0:c7200-ik8s-mz.122-40.bin"


This product contains cryptographic features and is subject to United
States and local country laws governing import, export, transfer and
use. Delivery of Cisco cryptographic products does not imply
third-party authority to import, export, distribute or use encryption.
Importers, exporters, distributors and users are responsible for
compliance with U.S. and local country laws. By using this product you
agree to comply with applicable laws and regulations. If you are unable
to comply with U.S. and local laws, return this product immediately.

A summary of U.S. laws governing Cisco cryptographic products may be found
at:
http://www.cisco.com/wwl/export/crypto/tool/stqrg.html

If you require further assistance please contact us by sending email to
export at cisco.com.

cisco 7204VXR (NPE300) processor (revision D) with 229376K/65536K bytes of
memory.
Processor board ID 26808507
R7000 CPU at 262Mhz, Implementation 39, Rev 2.1, 256KB L2, 2048KB L3 Cache
4 slot VXR midplane, Version 2.6

Last reset from power-on
Bridging software.
X.25 software, Version 3.0.0.

PCI bus mb0_mb1 (Slots 0, 1, 3 and 5) has a capacity of 600 bandwidth
points.
Current configuration on bus mb0_mb1 has a total of 400 bandwidth points. 
This configuration is within the PCI bus capacity and is supported. 

PCI bus mb2 (Slots 2, 4, 6) has a capacity of 600 bandwidth points.
Current configuration on bus mb2 has a total of 0 bandwidth points 
This configuration is within the PCI bus capacity and is supported. 

Please refer to the following document "Cisco 7200 Series Port 
Adaptor Hardware Configuration Guidelines" on CCO <www.cisco.com>, 
for c7200 bandwidth points oversubscription/usage guidelines.


2 FastEthernet/IEEE 802.3 interface(s)
125K bytes of non-volatile configuration memory.

20480K bytes of Flash PCMCIA card at slot 0 (Sector size 128K).
4096K bytes of Flash internal SIMM (Sector size 256K).
Configuration register is 0x2102


_______________________________________________________
Skeeve Stevens, RHCE     Email: skeeve at skeeve.org
Website: www.skeeve.org  - Telephone: (0414) 753 383
skype://skeeve
Address: P.O Box 1035, Epping, NSW, 1710, Australia

eIntellego - skeeve at eintellego.net - www.eintellego.net
_______________________________________________________
I'm a groove licked love child king of the verse
Si vis pacem, para bellum