[c-nsp] DS3 mux issues
Darryl Dunkin
ddunkin at netos.net
Tue Dec 9 16:46:06 EST 2008
The line code for individual T1s is handled on the MUX. Based on the
counters of line code violations, I'd check there first and see what it
is set to.
-----Original Message-----
From: cisco-nsp-bounces at puck.nether.net
[mailto:cisco-nsp-bounces at puck.nether.net] On Behalf Of Justin Shore
Sent: Tuesday, December 09, 2008 13:29
To: 'Cisco-nsp'
Subject: [c-nsp] DS3 mux issues
We're staging a DS3 mux to aggregate T1s back to a PA-MC-2T3-EC in a
7206VXR (G2) running 12.4(15)T7. I haven't channelized a T3 before so
I'm feeling my way through this. It looks to be relatively simple but
I'm getting tripped up somewhere. On the 7206:
controller T3 1/0
cablelength 10
logging-events detail
t1 1 channel-group 0 timeslots 1-24
t1 2 channel-group 0 timeslots 1-24
t1 3 channel-group 0 timeslots 1-24
t1 4 channel-group 0 timeslots 1-24
t1 5 channel-group 0 timeslots 1-24
t1 6 channel-group 0 timeslots 1-24
t1 7 channel-group 0 timeslots 1-24
t1 8 channel-group 0 timeslots 1-24
t1 9 channel-group 0 timeslots 1-24
t1 10 channel-group 0 timeslots 1-24
t1 11 channel-group 0 timeslots 1-24
t1 12 channel-group 0 timeslots 1-24
t1 13 channel-group 0 timeslots 1-24
t1 14 channel-group 0 timeslots 1-24
t1 15 channel-group 0 timeslots 1-24
t1 16 channel-group 0 timeslots 1-24
t1 17 channel-group 0 timeslots 1-24
t1 18 channel-group 0 timeslots 1-24
t1 19 channel-group 0 timeslots 1-24
t1 20 channel-group 0 timeslots 1-24
t1 21 channel-group 0 timeslots 1-24
t1 22 channel-group 0 timeslots 1-24
t1 23 channel-group 0 timeslots 1-24
t1 24 channel-group 0 timeslots 1-24
t1 25 channel-group 0 timeslots 1-24
t1 26 channel-group 0 timeslots 1-24
t1 27 channel-group 0 timeslots 1-24
t1 28 channel-group 0 timeslots 1-24
I've got a spare 2811 with a VWIC-2MFT-T1 on the other end configured
like this:
controller T1 0/1/0
framing esf
linecode b8zs
cablelength short 133
channel-group 0 timeslots 1-24
!
controller T1 0/1/1
framing esf
linecode b8zs
cablelength short 133
channel-group 0 timeslots 1-24
Clock source is internal on the 7206 and line on the 2811. Everything
else assumed the default settings.
In the middle is a new Wide Bank 28 that was set up by one of our telco
guys. He said the necessary config is minimal.
My T3 is up but I'm down/down on the serial ints on both ends. I can
manually loop up the 2811 at the VWIC and the int comes up. I can loop
it up at the biscuit jack on the 2811's side of the mux and the
appropriate T1 on the 7206 comes up. To me that makes me think the mux
is fine and that both ends are fine (at least from their perspective).
So that makes me think that something isn't matching up on the 7206 and
2811.
The linecode on the T3 is B3ZS of course and framing for the T1 is ESF.
The T1 on the 2811 is B8ZS and ESF.
On the 7206:
7206-1.amherst#sh controllers t3 1/0 br
T3 1/0 is up.
Applique type is Channelized T3/T1
No alarms detected.
Framing is M23, Line Code is B3ZS, Clock Source is Internal
Equipment customer loopback
T1 1 is down
timeslots: 1-24
FDL per AT&T 54016 spec.
Transmitter is sending LOF Indication.
Receiver is getting AIS.
Framing is ESF, Clock Source is Internal
7206-1.amherst#sh controllers t3 1/0
T3 1/0 is up.
Applique type is Channelized T3/T1
No alarms detected.
Framing is M23, Line Code is B3ZS, Clock Source is Internal
Equipment customer loopback
Data in current interval (611 seconds elapsed):
0 Line Code Violations, 0 P-bit Coding Violation
0 C-bit Coding Violation, 0 P-bit Err Secs
0 P-bit Severely Err Secs, 0 Severely Err Framing Secs
0 Unavailable Secs, 0 Line Errored Secs
0 C-bit Errored Secs, 0 C-bit Severely Errored Secs
0 Severely Errored Line Secs
0 Far-End Errored Secs, 0 Far-End Severely Errored Secs
0 CP-bit Far-end Unavailable Secs
0 Near-end path failures, 0 Far-end path failures
0 Far-end code violations, 0 FERF Defect Secs
0 AIS Defect Secs, 0 LOS Defect Secs
Data in Interval 1:
0 Line Code Violations, 0 P-bit Coding Violation
0 C-bit Coding Violation, 0 P-bit Err Secs
0 P-bit Severely Err Secs, 0 Severely Err Framing Secs
0 Unavailable Secs, 0 Line Errored Secs
0 C-bit Errored Secs, 0 C-bit Severely Errored Secs
0 Severely Errored Line Secs
0 Far-End Errored Secs, 0 Far-End Severely Errored Secs
0 CP-bit Far-end Unavailable Secs
0 Near-end path failures, 0 Far-end path failures
0 Far-end code violations, 0 FERF Defect Secs
0 AIS Defect Secs, 0 LOS Defect Secs
Data in Interval 2:
0 Line Code Violations, 0 P-bit Coding Violation
0 C-bit Coding Violation, 0 P-bit Err Secs
0 P-bit Severely Err Secs, 0 Severely Err Framing Secs
0 Unavailable Secs, 0 Line Errored Secs
0 C-bit Errored Secs, 0 C-bit Severely Errored Secs
0 Severely Errored Line Secs
0 Far-End Errored Secs, 0 Far-End Severely Errored Secs
0 CP-bit Far-end Unavailable Secs
0 Near-end path failures, 0 Far-end path failures
0 Far-end code violations, 0 FERF Defect Secs
0 AIS Defect Secs, 0 LOS Defect Secs
Data in Interval 3:
0 Line Code Violations, 0 P-bit Coding Violation
0 C-bit Coding Violation, 0 P-bit Err Secs
0 P-bit Severely Err Secs, 0 Severely Err Framing Secs
0 Unavailable Secs, 0 Line Errored Secs
0 C-bit Errored Secs, 0 C-bit Severely Errored Secs
0 Severely Errored Line Secs
0 Far-End Errored Secs, 0 Far-End Severely Errored Secs
0 CP-bit Far-end Unavailable Secs
0 Near-end path failures, 0 Far-end path failures
0 Far-end code violations, 0 FERF Defect Secs
0 AIS Defect Secs, 0 LOS Defect Secs
Data in Interval 4:
0 Line Code Violations, 0 P-bit Coding Violation
0 C-bit Coding Violation, 0 P-bit Err Secs
0 P-bit Severely Err Secs, 0 Severely Err Framing Secs
0 Unavailable Secs, 0 Line Errored Secs
0 C-bit Errored Secs, 0 C-bit Severely Errored Secs
0 Severely Errored Line Secs
0 Far-End Errored Secs, 0 Far-End Severely Errored Secs
0 CP-bit Far-end Unavailable Secs
0 Near-end path failures, 0 Far-end path failures
0 Far-end code violations, 0 FERF Defect Secs
0 AIS Defect Secs, 0 LOS Defect Secs
Data in Interval 5:
0 Line Code Violations, 0 P-bit Coding Violation
0 C-bit Coding Violation, 0 P-bit Err Secs
0 P-bit Severely Err Secs, 0 Severely Err Framing Secs
0 Unavailable Secs, 0 Line Errored Secs
0 C-bit Errored Secs, 0 C-bit Severely Errored Secs
0 Severely Errored Line Secs
0 Far-End Errored Secs, 0 Far-End Severely Errored Secs
0 CP-bit Far-end Unavailable Secs
0 Near-end path failures, 0 Far-end path failures
0 Far-end code violations, 0 FERF Defect Secs
0 AIS Defect Secs, 0 LOS Defect Secs
Data in Interval 6:
0 Line Code Violations, 0 P-bit Coding Violation
0 C-bit Coding Violation, 0 P-bit Err Secs
0 P-bit Severely Err Secs, 0 Severely Err Framing Secs
0 Unavailable Secs, 0 Line Errored Secs
0 C-bit Errored Secs, 0 C-bit Severely Errored Secs
0 Severely Errored Line Secs
0 Far-End Errored Secs, 0 Far-End Severely Errored Secs
0 CP-bit Far-end Unavailable Secs
0 Near-end path failures, 0 Far-end path failures
0 Far-end code violations, 0 FERF Defect Secs
0 AIS Defect Secs, 0 LOS Defect Secs
Data in Interval 7:
0 Line Code Violations, 0 P-bit Coding Violation
0 C-bit Coding Violation, 0 P-bit Err Secs
0 P-bit Severely Err Secs, 0 Severely Err Framing Secs
0 Unavailable Secs, 0 Line Errored Secs
0 C-bit Errored Secs, 0 C-bit Severely Errored Secs
0 Severely Errored Line Secs
0 Far-End Errored Secs, 0 Far-End Severely Errored Secs
0 CP-bit Far-end Unavailable Secs
0 Near-end path failures, 0 Far-end path failures
0 Far-end code violations, 0 FERF Defect Secs
0 AIS Defect Secs, 0 LOS Defect Secs
Data in Interval 8:
0 Line Code Violations, 0 P-bit Coding Violation
0 C-bit Coding Violation, 0 P-bit Err Secs
0 P-bit Severely Err Secs, 0 Severely Err Framing Secs
1 Unavailable Secs, 0 Line Errored Secs
0 C-bit Errored Secs, 0 C-bit Severely Errored Secs
0 Severely Errored Line Secs
0 Far-End Errored Secs, 0 Far-End Severely Errored Secs
0 CP-bit Far-end Unavailable Secs
0 Near-end path failures, 1 Far-end path failures
0 Far-end code violations, 10 FERF Defect Secs
0 AIS Defect Secs, 0 LOS Defect Secs
Total Data (last 8 15 minute intervals):
0 Line Code Violations, 0 P-bit Coding Violation,
0 C-bit Coding Violation, 0 P-bit Err Secs,
0 P-bit Severely Err Secs, 0 Severely Err Framing Secs,
1 Unavailable Secs, 0 Line Errored Secs,
0 C-bit Errored Secs, 0 C-bit Severely Errored Secs
0 Severely Errored Line Secs
0 Far-End Errored Secs, 0 Far-End Severely Errored Secs
0 CP-bit Far-end Unavailable Secs
0 Near-end path failures, 1 Far-end path failures
0 Far-end code violations, 10 FERF Defect Secs
0 AIS Defect Secs, 0 LOS Defect Secs
T1 1 is down
timeslots: 1-24
FDL per AT&T 54016 spec.
Transmitter is sending LOF Indication.
Receiver is getting AIS.
Framing is ESF, Clock Source is Internal
BERT test result (done)
Test Pattern : All 0's, Status : Not Sync, Sync Detected : 0
Interval : 5 minute(s), Time Remain : 0 minute(s)
Bit Errors (since BERT started): 0 bits,
Bits Received (since BERT started): 3 Mbits
Bit Errors (since last sync): 0 bits
Bits Received (since last sync): 0 Kbits
Data in current interval (509 seconds elapsed):
0 Line Code Violations, 0 Path Code Violations
0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs
509 Unavail Secs, 0 Stuffed Secs
255 Near-end path failures, 0 Far-end path failures, 0 SEF/AIS
Secs
Data in Interval 1:
0 Line Code Violations, 0 Path Code Violations
0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs
900 Unavail Secs, 0 Stuffed Secs
450 Near-end path failures, 0 Far-end path failures, 0 SEF/AIS
Secs
Data in Interval 2:
0 Line Code Violations, 0 Path Code Violations
0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs
900 Unavail Secs, 0 Stuffed Secs
450 Near-end path failures, 0 Far-end path failures, 0 SEF/AIS
Secs
Data in Interval 3:
0 Line Code Violations, 0 Path Code Violations
0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs
717 Unavail Secs, 0 Stuffed Secs
361 Near-end path failures, 1 Far-end path failures, 0 SEF/AIS
Secs
Data in Interval 4:
0 Line Code Violations, 0 Path Code Violations
0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs
900 Unavail Secs, 0 Stuffed Secs
450 Near-end path failures, 0 Far-end path failures, 0 SEF/AIS
Secs
Data in Interval 5:
0 Line Code Violations, 0 Path Code Violations
0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs
900 Unavail Secs, 0 Stuffed Secs
450 Near-end path failures, 0 Far-end path failures, 0 SEF/AIS
Secs
Data in Interval 6:
0 Line Code Violations, 0 Path Code Violations
0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs
900 Unavail Secs, 0 Stuffed Secs
450 Near-end path failures, 0 Far-end path failures, 0 SEF/AIS
Secs
Data in Interval 7:
0 Line Code Violations, 0 Path Code Violations
0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs
847 Unavail Secs, 0 Stuffed Secs
429 Near-end path failures, 2 Far-end path failures, 0 SEF/AIS
Secs
Data in Interval 8:
0 Line Code Violations, 0 Path Code Violations
0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs
900 Unavail Secs, 0 Stuffed Secs
450 Near-end path failures, 0 Far-end path failures, 0 SEF/AIS
Secs
Total Data (last 8 15 minute intervals):
0 Line Code Violations,0 Path Code Violations,
0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins,
0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs
6964 Unavail Secs, 0 Stuffed Secs
On the 2811:
S1-2811#sh controllers t1 0/1/0 br
T1 0/1/0 is down.
Applique type is Channelized T1
Cablelength is short 133
Transmitter is sending remote alarm.
Receiver has loss of signal.
alarm-trigger is not set
Soaking time: 3, Clearance time: 10
AIS State:Clear LOS State:Clear LOF State:Clear
Version info Firmware: 20070320, FPGA: 20, spm_count = 0
Framing is ESF, FDL is ansi & att, Line Code is B8ZS, Clock Source is
Line.
CRC Threshold is 320. Reported from firmware is 320.
Data in current interval (760 seconds elapsed):
0 Line Code Violations, 0 Path Code Violations
0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 760
Unavail Secs
Total Data (last 26 15 minute intervals):
37460 Line Code Violations, 8785 Path Code Violations,
2 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins,
2 Errored Secs, 0 Bursty Err Secs, 7 Severely Err Secs, 22169
Unavail Secs
I can't find any way to set the line code on the 7206 for the individual
T1s. The virtual serial ints only have an IP on them at this point.
Everything is unshut. Any idea what I could be missing? What's causing
all the path and line code violations?
Thanks
Justin
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