[c-nsp] ASIC to switch port mapping

[Geert Nijs]

Hi all,

I am pretty sure the C3750/C3560 ranges of switches have 2 MB of buffer
space / ASIC.
How many ports are connected on an ASIC depends and differs in each model:
some models have 4 ports / ASIC, other
24 ports / ASIC :-)

The buffer space of 2 MB is divided in 4 queues which you can program with
the mls qos settings.
You can allow a queue to expand all the way up to 2 MB if needed (or you can
also program the queue NOT to do that)
If i remember correctly by heart, the default setting of Cisco is to cut up
the 4 queueu evenly (25 25 25 25),
then reserve half of each queue (dedicated, reserved 50% 50% 50% 50%) And
then allow each queue to "borrow" space
from neighboring queues to grow up to 100% meaning doubling (??).
I have found that this limit is too low (100% is not allowing to use the
full queue: 25 x 2 = 50% half of available space).
Therefore i put the "burst" percentages to 400%, meaning each queue of 25%
can grow 4 times up to 100% of buffer space, all
of the 2 MB.
Remember: all these 4 queues are shared between ports on the same ASIC

Here is - an already famous document (i think lots of people have already
spent hours understanding this doc :-)

http://www.cisco.com/en/US/products/hw/switches/ps5023/products_tech_note09186a0080883f9e.shtml

regards,
Geert

2010/9/14 Nick Hilliard <nick at foobar.org>

On 13/09/2010 21:33, Benny Amorsen wrote:
> > 3MB per PFE, according to:
> >
> >
> http://www.juniper.net/us/en/local/pdf/implementation-guides/8010073-en.pdf
>
> http://kb.juniper.net/KB10963
>
> so, the 24 port model has 2 PFEs (i.e. 6M buffer space) and the 48, 3 PFEs
> (9 meg).  That's not really very much, particularly the way that it's
> divvied up.
>
> > I'm not sure how much buffer the 3560 actually has, just that it isn't
> > enough.
>
> See a couple of postings back:
>
> http://networking.ventrefamily.com/2010/09/3560ge-and-3750ge-buffers.html
>
> quoth cisco: "these platforms [Catalyst 3560G/3750G and 3650-E/3750E ]
> provide (minimally) 750 KB of receive buffers and (up to) 2 MB of transmit
> buffers for each set of 4 ports".  Again, this looks like a simplification.
>
> It would help enormously if Cisco were to publish clear and extensive
> documentation as to how buffering on each of the 3560/3750 models actually
> works.  Would anyone from Cisco on this list be able to oblige here?  Or if
> its already published somewhere, could you point us in the right direction?
>
> Nick
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