[c-nsp] ASR100x route tables sanity check

[Christopher J. Pilkington]

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I'm looking at the new ASR100x series boxes. 

We'll have 6 routers, each with a eBGP upstream and full iBGP
mesh.  So, worst case, 6 full tables.

ASR1001 literature claims 1M IPv4 routes in the ESP
documentation, which I'm assuming refers to the FIB.  The FIB at
any given time should have one full table, correct?

The ASR1001 integrated RP will accept 16 GiB of RAM.  Now,
memory sizes are much different on this platform than before,
but even that given, this suggests that I can have many copies
of the DFZ table in the RIB.  (No, we won't run "software
redundancy".)

Am I reading this correctly?

I requested a demo box from our SE, he told me it would be
months.  We can't wait that long.  Worst case, I may just have
to stick with what we know (72xx).

- -cjp

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