[c-nsp] ISR 4451-X route table size

Gert Doering gert at greenie.muc.de
Thu Jan 15 06:53:23 EST 2015


On Thu, Jan 15, 2015 at 12:07:21PM +0100, Fernando García Fernández wrote:
> > El 15/1/2015, a las 11:37, Gert Doering <gert at greenie.muc.de> escribió:
> > 
> > I tend to make the distinction at "there's a general purpose CPU that
> > handles data plane and control plane" vs. "the general purpose CPU does
> > control plane, and dedicated 'magic stuff' handles packet forwarding" - 
> > which would make the 4451 "software" and the ASR1k "hardware??????
> Interesting your distinction because Cisco says that the 4451:
> "The product???s innovative hardware design splits the control and data planes between two multi-core CPUs???

Indeed, that's where my definition would not trivially apply either way :-)

(And given how fast multipurpose CPUs have become, we see this in other
areas as well - like "SSL offloading PCI boards" that you could add to
a web server for decent HTTPS performance... most of that has just plain
disappeared with modern CPUs...)


USENET is *not* the non-clickable part of WWW!
Gert Doering - Munich, Germany                             gert at greenie.muc.de
fax: +49-89-35655025                        gert at net.informatik.tu-muenchen.de
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