[c-nsp] Route processor memory at 99% on 720-3bxl

Mark Tinka mark.tinka at seacom.mu
Wed Jun 22 15:35:02 EDT 2016

On 22/Jun/16 19:32, Mack McBride wrote:

> My understanding is that on the 6500/7600 series the IP RIB Update process also contains the prebuilt FIB to be pushed into CEF.
> I may be wrong on that but I don't think so.  BGP-SD definitely does not push the routes into the IP RIB Update process.

You can't stop the control plane from receiving the routes once they
have arrived. But you can stop the data plane from doing so.


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