[c-nsp] Non-fatal interrupt FIB

James Bensley jwbensley at gmail.com
Wed Nov 9 10:18:06 EST 2016


On 8 November 2016 at 19:04, Anders Löwinger <anders at abundo.se> wrote:
> Den 2016-11-08 kl. 19:26, skrev James Bensley:
>>
>>  From what I could see the articles were suggesting there was a single
>> bit error which was corrected due to the use of ECC memory (I guess
>> this could throw an interrupt? not sure why though).
>
>
> Typically the interrupt handler does a read/write of the memory address with
> the error.
>
> If the bit error is soft (background radiation, other disturbances) this
> will clear the error.


If the device is using ECC memory I would have expected the memory to
correct the error in hardware without and software input. Ho-hum...

Cheers,
James.


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