[c-nsp] Non-fatal interrupt FIB

Anders Löwinger anders at abundo.se
Wed Nov 9 13:39:18 EST 2016


2016-11-09 16:18 GMT+01:00 James Bensley <jwbensley at gmail.com>:

>
> If the device is using ECC memory I would have expected the memory to
> correct the error in hardware without and software input. Ho-hum...


Nope, that is not how it normally works.

Read 72-bit, ECC does it magic returning 64 bits. If one bit error =>
correct this and return data to CPU.

The bit error is still in DRAM, so next read will also be corrected.

To clear the error, you need to write to the memory.

All this, assuming the error is transient.

/Anders


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