[c-nsp] Cisco N540-ACC-SYS ipv4 routes

[Mark Tinka]

On 16/Jul/20 10:24, James Bensley wrote:

>
> Take the ME3600X and early ASR920 devices for example (I don't know so
> much about the more recent ASR920s);

I think the ASR920 hasn't changed since the beginning. It runs the Cylon
ASIC on all models I am aware of.


>  Technically the ME3600X/ME3800X use two ASICs linked via a
> PCI link which is non-blocking, but this is just horizontal scaling to
> accomodate for additional ports, it's two of the exact same ASIC which
> both have on chip TCAM and buffers and both carry all forwarding
> information and perform all functions.

Yes, the Nile ASIC on the ME3600X/3800X was actually 2 of them in one
box. It was what Cisco called their "Cisco Carrier Ethernet ASIC", at
the time. Each chip was good for 24Gbps packet processing, and both
combined had a capability of 65Mpps.

The system was also equipped with what Cisco called their "Magic FPGA".
It was meant to offload certain processing requirements from Nile such
as OAM, performance monitoring, video monitoring, fast hellos, packet
inspection, e.t.c.

Nile was attached to:

    - 2x 64/96-bit 400MHz RLDRAM packet buffers.
    - 1x 36-bit 400MHz QDR SRAM.
    - 1x 400MHz TCAM chip.
    - 1x Forwarding RAM.

Mark.