[j-nsp] M20 Hardware Limitation

[The Drifter]

Thanks. It is now clear.
I noticed the following pic-combo listed: Gigabit Ethernet-  Serial -  
Serial IQ -  Tunnel

If one has following three: GE - P-OC12 - P-4E3-QPP  then, one is at Risk?




>From: Pekka Savola <pekkas at netcore.fi>
>To: The Drifter <prophecy_68 at hotmail.com>
>CC: juniper-nsp at puck.nether.net
>Subject: Re: [j-nsp] M20 Hardware Limitation
>Date: Wed, 14 Dec 2005 09:42:15 +0200 (EET)
>
>On Wed, 14 Dec 2005, The Drifter wrote:
>>In the light of PSN-2005-06-001. We cannot install 3xP-1OC12 or 3xP-1GE 
>>pics inside a single FPC. This means that the maximum number of STM-4 pics 
>>I can have = 8 in a chassis. This equates to only 5Gbps of throughput out 
>>of an M20
>
>You're misreading PSN-2005-06-001, you probably read "all invalid PIC 
>combinations result from having three or more PICs installed on a single 
>Enhanced FPC" out of context.  The PSN is about installing too many 
>different kinds of (FPC memory-consuming) PICs in an FPC. Installing same 
>PICs is fine.
>
>--
>Pekka Savola                 "You each name yourselves king, yet the
>Netcore Oy                    kingdom bleeds."
>Systems. Networks. Security. -- George R.R. Martin: A Clash of Kings

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