[j-nsp] m320

sunnyday cscosunny at gmail.com
Thu Dec 20 16:53:49 EST 2007


my question was about load balancing because i read that at internet 
processor 2 is per flow an plain internet processor is random



----- Original Message ----- 
From: "Richard A Steenbergen" <ras at e-gerbil.net>
To: "sunnyday" <cscosunny at gmail.com>
Cc: "Juniper-Nsp" <juniper-nsp at puck.nether.net>
Sent: Thursday, December 20, 2007 10:04 PM
Subject: Re: [j-nsp] m320


> On Thu, Dec 20, 2007 at 09:07:15PM +0200, sunnyday wrote:
>> m320 is using internet processor II or plain internet processor?
>
> Neither. M320 is a Gibson architecture platform (basically its a T320 in a
> bigger chassis). The routing ASIC is the R-chip, which is distributed over
> the FPCs rather than being centralized like the Internet Processor ASICs.
> Each PFE has an R-Chip, which on the T320/M320 means one per FPC. On T640
> the FPC3 has 2x (each one is capable of doing 20Gbps), everything else is
> built with one.
>
> -- 
> Richard A Steenbergen <ras at e-gerbil.net>       http://www.e-gerbil.net/ras
> GPG Key ID: 0xF8B12CBC (7535 7F59 8204 ED1F CC1C 53AF 4C41 5ECA F8B1 2CBC) 



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