[j-nsp] RIB and FIB - Memory for MX with LR

[Saku Ytti]

On (2013-06-28 00:14 -0300), Giuliano Medalha wrote:

> How much routes is possible in FIB for MX480 ?  2.5M ?  For this board when
> create logical system it divide by two ?

The answer would be same for anything from MX80 to T4k FPC5, as they all
have same 256MB RLDRAM for LU.

Now how many routes that'll actually fit is harder question to answer. You
can make some guesses by looking at 'show route hw-usage 2 0', 'show route
summary' and 'show jnh 0 pool ...'

Very naive look tells for my boxes I'm using about 77B per IPV4 route, so
that would peg me around 3.5M routes. But the RLDRAM is shared by
everything so it's not even theoretic possibility, I would guess that
practical limit is somewhere between 1-1.5M

For me it is rather modest amount of routes, as we have high degree of iBGP
fragmentation and lot of VPNv4 routes, we have boxes which have 750k IPv4
FIB today. I expect that FIB scale is going to be next reason why we need
to trigger upgrades, not pps/bps, not NPU features, not control-plane.
But for most others, 1M seems enough for next 5 years. 

For chassis based boxes something like this[0] could potentially allow
delaying upgrades by reducing FIB demand in WAN facing linecards.

[0] http://www.juniper.net/techpubs/en_US/junos/topics/concept/fib-localization-overview.html

-- 
  ++ytti