[j-nsp] l2circuit between ASR9k and MX80

[Marcin Kurek]

Hi Saku,

I wanted to follow-up with the results of further testing in the lab.

>  Quote from cisco docs:
>  "In order to address this possibility, the EVC platforms insert a 
dummy VLAN
>  tag 0 on top of the frame for type 4 PWs"

I did a packet capture on one of the core links and it clearly shows 
that above isn't true.
When setting VC Type 4 (VLAN mode) between ASR9k w/ Typhoon LC and MX80 
the tag is stripped (rewrite ingress tag pop 1 symmetric) and then it is 
pushed again, so the packet is traversing the core with tag 3101.

Also I tested this configuration:

 >> ----A----
 >> interface GigabitEthernet0/1/0/19.100 l2transport
 >> encapsulation dot1q 100
 >>
 >>
 >> ----B----
 >> interface GigabitEthernet0/1/0/19.200 l2transport
 >> encapsulation dot1q 200
 >> rewrite ingress tag translate 1-to-1 dot1q 100 symmetric

>This  looks problematic, not sure if it even works, but if it does, B needs to
>know  A side config when provisioning, this type of dependency should be
>avoided  when possible.

And it seems to be working, although I understand your point.

Thanks for your input, you helped me a lot.

Marcin