[j-nsp] Juniper PTX1000

[adamv0025 at netconsultings.com]

Hey Saku,

> Saku Ytti [mailto:saku at ytti.fi]
> Sent: Monday, December 19, 2016 2:31 PM
> 
> 'can live with MX limitations', is odd thing to say, considering MX is NPU/run-
> to-completion, it can do everything, in due time. What limitations does it
> have over PTX? Whole value proposition of PTX is if you don't need all MX
> functionality, but you need density or better watt or dollar per Gbps. PTX is
> cheaper, stupider box.
I guess this happens when I refrain from going into details.  
Yes I agree MX is a Swiss army knife compared to a PTX spear. 
However when talking about limitations I wasn't talking about range of supported capabilities. 
I was talking about certain HW architecture features that *some folks deem as a must on a core router platform for converged MPLS backbone and about how MX falls short when it's internal architecture is compared to that of a PTX/CRS-X/NCS6k and even ASR9k. Although for the purpose of this discussion a fair comparison would be only between ASR9k and MX in a P role. 

*I guess it boils down to your customer/product base or in other words how tight SLAs your backbone needs to adhere to. 



> Of course if you don't need the density and PTX port utilisation is poor, then
> it'll be expensive stupid box.
>
To that I'd only add: and/or you don't need the **premium HW architecture.

**due to the lack of a better term, cause I actually believe all boxes marketed as MPLS P/PE should have these HW features. 
    
 
> When you talk about QFX, I wonder what QFX you mean. For Internet use
> only QFX10k makes sense, rest of them do not have port buffers for Internet
> requirements. 
I meant the small 5k ones.


> And QFX10k is literally same box as PTX1k, with half the
> control-plane DRAM. Any differences presented are purely marketing.
> Granted it seems QFX10k is being marketed and small-FIB PTX1k.
>
Good to know.

> ASR9k right now should be approached with caution, only Tomahawk is
> supported in XRe and not all interfaces you might be interested have
> Tomahawk card out. There is also new architecture in horizon, both new
> architecture and XRe are opportunities, but they are also risks.
> 
But the Trident and Typhoon cards will remain supported on the 32-bit version of the code so no worries there.


> CRS-x is NPU/run-to-completion, so it's much closer to ASR9k/MX then
> pipeline based PTX/NCS. I agree that PTX/QFX10k compare against NCS5k.
> 
Both CRS-X and NCS6k are powered by nPower X1e NPU. 
And my understanding is that it's Homogeneous(Same PPE type) MPSoC i.e. Symmetric MultiProcessing (SMP), much like all the chips out there (used in ASR9k or MX and PTX, ...).
The difference I understand is in the instruction set that the PPE is running.
And my guess is that threads on each PPE are using run to completion scheduling. 
Let me know your thoughts please.

And by pipeline with regards to NPU design I understand pipelining of arrays of PPEs where each array in the pipeline consists of PPEs dedicated to a specific function(parse search modify). -like in ASR9k.


adam



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