[c-nsp] Troubleshooting IPv6 throughput on a GSR 12410

[Oliver Boehmer (oboehmer)]

Aaron Daubman <> wrote on Thursday, December 15, 2005 6:50 PM:

> Thanks for the tip... where would I find documentation regarding IPv6
> being CPU forwarded on engine 4 cards?  Is there a recommended GigE
> card that would support "advanced features" ('flexible' QoS, MPLS...)
> and also hardware-forward v6 traffic at line-rate?

Need to check for the docs (the data sheet doesn't mention IPv6 in HW,
while it does on the E3/E5), but the Engine 3 (4GE) or Engine 5
(SIP-600/SIP-601) do IPv6 at line rate. E2/E4 and E6 use the LC CPU.

If you are running MPLS, you can run 6PE in Hardware on the E4+ used as
core-facing (label disposition) LC and E3 towards the v6 domain (CE).

> 
> Also, overall CPU util shows up high (see below) but how do I
> correlate that to CPU-switched v6?  (eg, are there other show commands
> that would point to that being the issue, or would one have to know
> that Engine4 handles v6 like that?)
>
> ----------------------------------------------------------
> LC-Slot2#sh proc cpu sorted 1min
> CPU utilization for five seconds: 52%/51%; one minute: 53%; five
>   minutes: 52% 

Your "show proc cpu" shows 51% in the interrupt path, those are
LC-CPU-switched packets. 

"show controller events" on your E4+ will likely show

RX HW Engine Reject Counters
...
Not IP V4 no options: <some-large-number>

which are your IPv6 pkts

	oli