[j-nsp] RIB and FIB - Memory for MX with LR

[Giuliano Medalha]

People,

Thinking about configuring 2 Logical Systems in a MX480 box with RE1800X4,
how can we provide control for memory allocation ?

The box has the following configuration:

2 x RE1800X4-16GB
1 x MPC-3D-16XGE-SFPP-R-B
2 x SCBE-MX

Is it possible to control the RIB and the FIB size using JUNOS for each
Logical System ?

Or is it automatic by the system ?

How much routes is possible in FIB for MX480 ?  2.5M ?  For this board when
create logical system it divide by two ?

Thanks a lot,

Giuliano