[j-nsp] Optimizing the FIB on MX

[Adam Vitkovsky]

> Dan Peachey
> Sent: Friday, February 19, 2016 11:07 AM
>
> Cisco often call this PIC core (hierarchical FIB). I think the different terms
> used by the different vendors causes some confusion. From what I
> understand...
>
> Cisco:
>
> H-FIB = PIC Core
> Node protection = PIC Edge Node Protection Link protection = PIC Edge Link
> Protection
>
> Juniper:
>
> H-FIB = Indirect next-hop
> Node protection = PIC Edge
> Link protection = Provider edge link protection
>
> However I've also seen node protection referred to as PIC core in some Cisco
> documentation, so who knows :)
>
Yeah very confusing indeed
The draft refers to PE-CE link failure as well as the egress node failure in the BGP-PIC Edge section.
And it refers to core link or node failure protection using LFA in BGP-PIC Core section.


adam



        Adam Vitkovsky
        IP Engineer

T:      0333 006 5936
E:      Adam.Vitkovsky at gamma.co.uk
W:      www.gamma.co.uk

This is an email from Gamma Telecom Ltd, trading as “Gamma”. The contents of this email are confidential to the ordinary user of the email address to which it was addressed. This email is not intended to create any legal relationship. No one else may place any reliance upon it, or copy or forward all or any of it in any form (unless otherwise notified). If you receive this email in error, please accept our apologies, we would be obliged if you would telephone our postmaster on +44 (0) 808 178 9652 or email postmaster at gamma.co.uk

Gamma Telecom Limited, a company incorporated in England and Wales, with limited liability, with registered number 04340834, and whose registered office is at 5 Fleet Place London EC4M 7RD and whose principal place of business is at Kings House, Kings Road West, Newbury, Berkshire, RG14 5BY.